EP20K400CF672I8
| Part Description |
APEX-20KC® Field Programmable Gate Array (FPGA) IC 488 212992 16640 672-BBGA |
|---|---|
| Quantity | 592 Available (as of May 26, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 488 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1664 | Number of Logic Elements/Cells | 16640 | ||
| Number of Gates | 1052000 | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 212992 |
Overview of EP20K400CF672I8 – APEX-20KC Field Programmable Gate Array (FPGA) 672-BBGA
The EP20K400CF672I8 is an APEX-20KC series field programmable gate array (FPGA) in a 672-ball BGA package, designed for industrial applications requiring medium-to-high logic density and flexible I/O. The device integrates a MultiCore architecture that combines look-up table (LUT) logic and embedded memory to address compute-intensive and memory-buffered functions.
Targeted at systems that need reprogrammable logic, on-chip memory, and robust I/O capability, this device delivers a balance of integration, performance, and temperature range for demanding embedded and industrial designs.
Key Features
- Core Fabric — 16,640 logic elements providing programmable logic resources to implement complex digital functions; approximately 1,052,000 system gates.
- Embedded Memory — Approximately 0.213 Mbits (212,992 bits) of on-chip RAM suitable for FIFOs, dual-port RAM, and other buffering tasks.
- I/O and Interfaces — Up to 488 user I/O pins, with MultiVolt I/O support noted in the APEX-20KC series for multiple interface voltages; programmable output slew-rate and individual tri-state control are supported by the family architecture.
- Clock and Timing — Flexible clock management architecture described for the APEX-20KC family, including support for up to four PLLs and up to eight global clock signals for low-skew system clocking.
- Power and Voltage — Internal supply operates around 1.8 V with the device data indicating supply range of 1.71 V to 1.89 V; copper interconnect in the family reduces power consumption.
- Package and Mounting — 672-BBGA (supplier package 672-FBGA, 27 × 27 mm) designed for surface-mount assembly.
- Operating Range — Industrial-grade temperature rating from −40 °C to 100 °C for deployment in thermally challenging environments.
- Design Tools and Support — The APEX-20KC family is supported by the Quartus II development system and Altera MegaCore functions as referenced for series-level software support and IP.
Typical Applications
- High-speed memory interfaces — Use embedded RAM and extensive I/O to implement DDR and ZBT memory controllers and buffering logic.
- Communications and networking — Implement protocol processing, packet buffering, and interface bridging leveraging the device’s logic density and I/O count.
- Industrial control and automation — Deploy in control systems that require programmable logic, deterministic clocking, and operation across −40 °C to 100 °C.
- PCI and legacy bus bridging — The APEX-20KC family supports common bus interfaces at the series level for integration into systems requiring PCI and related I/O standards.
Unique Advantages
- High logic density: 16,640 logic elements and roughly 1,052,000 system gates enable implementation of complex functions on a single device, reducing board-level component count.
- On-chip buffering: Approximately 212,992 bits of embedded memory allow local storage for FIFOs and data pipelines, minimizing external memory dependence.
- Robust I/O complement: 488 user I/O pins provide flexibility for interfacing multiple peripherals and high-pin-count buses without multiplexing compromises.
- Industrial temperature capability: Rated for −40 °C to 100 °C, suitable for equipment deployed in harsh or wide-temperature environments.
- Surface-mount BGA packaging: 672-ball BGA (27 × 27 mm) enables compact board layouts while supporting high pin density.
- Clock management features: Series-level support for multiple PLLs and several global clocks simplifies timing architectures for synchronous systems.
Why Choose EP20K400CF672I8?
The EP20K400CF672I8 brings APEX-20KC family architecture into a single industrial-grade FPGA package, combining substantial logic resources, embedded memory, and a high I/O count for versatile system integration. Its supply-voltage window and temperature rating support deployment in industrial environments that require reliable, reprogrammable logic.
This device is well suited to engineers and system designers who need a mid-density FPGA with on-chip memory for buffering, flexible clocking, and extensive I/O — offering a scalable building block for network, control, and interface-intensive applications supported by the APEX-20KC toolchain and IP ecosystem.
Request a quote or submit an inquiry to obtain pricing and availability for the EP20K400CF672I8.

Date Founded: 1968
Headquarters: Santa Clara, California, USA
Employees: 130,000+
Revenue: $54.23 Billion
Certifications and Memberships: ISO9001:2015, ISO14001:2015, ISO17025:2017, ISO27001:2022, ISO45001:2018, ISO50001:2018