HC20K1000FC672AB
| Part Description |
APEX® HardCopy® Field Programmable Gate Array (FPGA) IC 327680 38400 672-BBGA |
|---|---|
| Quantity | 218 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 488 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 38400 | ||
| Number of Gates | 1000000 | ECCN | OBSOLETE | HTS Code | 0000.00.0000 | ||
| Qualification | N/A | Total RAM Bits | 327680 |
Overview of HC20K1000FC672AB – APEX® HardCopy® Field Programmable Gate Array (FPGA) IC 327680 38400 672-BBGA
The HC20K1000FC672AB is an Intel APEX® HardCopy® device optimized for high-density, high-volume applications. It preserves the functionality of configured APEX 20KC/20KE designs while offering a non‑programmable, migration-ready silicon option targeted at production deployments.
Built on HardCopy APEX architecture, this commercial‑grade device delivers 38,400 logic elements, approximately 0.328 Mbits of embedded memory, extensive I/O and a 672‑ball BGA package for compact, surface‑mount system designs.
Key Features
- Core Architecture 38,400 logic elements and approximately 1,000,000 typical gates provide high-density logic integration for complex digital functions.
- Embedded Memory Approximately 327,680 total RAM bits of on-chip memory enable block RAM, FIFO and dual-port RAM implementations without reducing available logic.
- I/O and Interface Support Up to 488 user I/O pins, MultiVolt I/O support for 1.8 V, 2.5 V and 3.3 V interfaces, plus 16 input and 16 output LVDS channels for high‑speed differential signalling.
- Clocking and Timing Up to four phase‑locked loops (PLLs) and up to eight global clock signals, with built‑in low‑skew clock tree and clock features (ClockLock, ClockBoost, ClockShift) for flexible clock management.
- Memory Interface Support Architecture supports high‑speed external memories including DDR, SDRAM and ZBT SRAM memory interfaces.
- Power and Supply Low-voltage core operation with supply range of 1.71 V to 1.89 V for energy‑efficient designs.
- Package and Mounting 672‑BBGA package (supplier device package: 672‑FBGA, 27×27 mm) in surface‑mount form factor for dense board layouts.
- Operating Conditions and Grade Commercial grade device with operating temperature range 0 °C to 85 °C and RoHS compliance for regulatory alignment.
- Production Migration HardCopy APEX devices preserve functionality and pin compatibility with APEX 20KC/20KE devices and support an automated migration process using Quartus® II generated files.
Typical Applications
- High‑volume consumer and industrial products Ideal for designs moving from programmable prototypes to cost‑optimized production silicon while retaining original device functionality.
- Memory interface controllers Use where on‑chip RAM plus support for DDR/SDRAM/ZBT external memories are required for buffering and high‑throughput data handling.
- PCI and peripheral systems Suitable for systems implementing PCI Local Bus interfaces at 3.3 V, leveraging the device’s compliant I/O capabilities.
- High‑density communication and networking LVDS channels and abundant user I/O make the device suitable for high‑throughput signalling and interface aggregation.
Unique Advantages
- Migration‑ready silicon: Preserves configured APEX 20KC/20KE functionality and pinout, simplifying transition from prototyping to production.
- High integration density: 38,400 logic elements and ~327,680 RAM bits reduce external component count and simplify board design.
- Flexible I/O mix: Up to 488 I/O pins, MultiVolt support and LVDS channels provide flexible interface options for mixed‑voltage systems.
- Robust clocking features: Multiple PLLs and global clocks with clock management features enable precise timing control for complex designs.
- Compact, production‑friendly package: 672‑BBGA surface‑mount package supports dense layouts for space‑constrained, high‑volume assemblies.
- Regulatory and commercial readiness: Commercial grade temperature range and RoHS compliance support mainstream product deployment.
Why Choose HC20K1000FC672AB?
The HC20K1000FC672AB positions itself as a high‑density HardCopy APEX device for designs that require a migration path from programmable prototypes to production silicon. With a substantial logic fabric, embedded memory, versatile I/O and production‑oriented packaging, it addresses common needs for cost reduction and BOM simplification in volume deployments.
Designers seeking to preserve APEX 20KE functionality while moving to non‑programmable, production silicon will find the HC20K1000FC672AB suitable for a range of applications that demand dense logic, memory interface support and flexible clocking options.
Request a quote or submit an inquiry to receive pricing, availability and lead‑time information for HC20K1000FC672AB.

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