LAV-AT-X70-1LFG1156C
| Part Description |
Avant™-X Field Programmable Gate Array (FPGA) IC 554 4239360 637000 1156-BBGA, FCBGA |
|---|---|
| Quantity | 320 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 8 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1156-FCBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1156-BBGA, FCBGA | Number of I/O | 554 | Voltage | 820 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | N/A | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 637000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 4239360 |
Overview of LAV-AT-X70-1LFG1156C – Avant™-X FPGA, 1156‑BBGA (35×35)
The LAV-AT-X70-1LFG1156C is an Avant™-X field programmable gate array (FPGA) IC from Lattice Semiconductor Corporation. It combines a high logic capacity fabric with on-chip memory, comprehensive clocking resources, and multi-protocol I/O capability for complex programmable logic and interface tasks.
Designed for commercial-grade applications, this surface-mount 1156‑FBGA (35×35) package offers 637,000 logic elements, approximately 4.24 Mbits of embedded memory, and 554 user I/Os, delivered with a single core supply of 820 mV and an operating temperature range of 0 °C to 85 °C.
Key Features
- Core Logic — 637,000 logic elements provide substantial programmable logic resources for complex designs and hardware acceleration.
- Embedded Memory — Approximately 4.24 Mbits of on-chip RAM (4,239,360 bits) with sysMEM features such as single/dual/pseudo-dual port modes, FIFO support, RAM initialization/ROM operation, and memory cascading.
- I/O Capacity — 554 user I/Os supporting multi-protocol interfaces and flexible sysI/O banking as described in the Avant platform architecture.
- Clocking & Timing — Integrated clock infrastructure including on-chip oscillator, PLL, global/regional/edge clock domains, dynamic clock select/control, DLL delay and clock synchronizers for precise timing and clock distribution.
- High-speed Interfaces & PHY — Platform-level support for SERDES, PCS, multi-protocol PHY integration and DDR memory support with DDRPHY and DQS grouping for robust high-bandwidth interface implementations.
- Signal Processing — sysDSP blocks included in the architecture for dedicated DSP processing capabilities.
- Device Configuration & Debug — Enhanced configuration options, JTAG support, SEU handling and trace ID facilities for configuration, verification and system reliability.
- Package & Mounting — 1156‑BBGA (1156‑FCBGA) surface-mount package, supplier package specified as 1156‑FCBGA (35×35), suitable for high-density board layouts.
- Commercial Grade & Compliance — Commercial temperature grade (0 °C to 85 °C) and RoHS compliant.
- Power — Core voltage supply specified at 820 mV.
Typical Applications
- High-performance communications — Implement multi-protocol PHYs, SERDES/PCS and high-bandwidth interfaces for networking and data transport systems.
- Memory interface controllers — Leverage sysMEM and DDRPHY support to implement DDR memory controllers, FIFOs and complex memory hierarchies.
- Signal processing and acceleration — Use sysDSP resources and large logic fabric for compute acceleration, filtering and real-time data processing.
- Custom I/O and protocol bridging — Deploy the extensive I/O count and programmable I/O cells to consolidate peripherals, bridge interfaces, or implement custom protocol adapters.
Unique Advantages
- High logic density: 637,000 logic elements enable large-scale FPGA implementations without multiple devices.
- Substantial embedded memory: Approximately 4.24 Mbits of on-chip RAM supports large buffers, FIFOs and complex state machines with flexible memory modes.
- Extensive I/O footprint: 554 user I/Os provide the pin-count needed for multi-interface systems and dense board-level integration.
- Comprehensive clocking and timing: On-chip oscillator, PLLs, multiple clock domains and dynamic clock control simplify timing architecture and system synchronization.
- Advanced interface support: Built-in SERDES/PCS, multi-protocol PHY options and DDRPHY support enable high-speed link and memory subsystem implementations.
- Compact, surface-mount package: 1156‑FCBGA (35×35) package offers a high-pin-count solution in a compact footprint for PCB space-constrained applications.
Why Choose LAV-AT-X70-1LFG1156C?
The LAV-AT-X70-1LFG1156C positions the Avant™-X platform’s capabilities into a commercial-grade FPGA offering that balances large-scale logic, embedded memory and high I/O density in a single 1156‑FBGA package. Its on-chip sysMEM, sysDSP, flexible clocking and comprehensive interface support make it suited for designs that require integrated memory handling, protocol bridging and high-speed link implementation.
This device is appropriate for system designers and engineers developing advanced communications, memory subsystem, and signal processing applications who need scalable FPGA resources, platform-level features, and vendor-provided architecture elements documented in the Avant platform overview.
Request a quote or submit an inquiry for pricing and availability for the LAV-AT-X70-1LFG1156C to evaluate fit for your next design.

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