LFE3-95E-6FN1156C
| Part Description |
ECP3 Field Programmable Gate Array (FPGA) IC 490 4526080 92000 1156-BBGA |
|---|---|
| Quantity | 98 Available (as of May 6, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 1156-FPBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1156-BBGA | Number of I/O | 490 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 11500 | Number of Logic Elements/Cells | 92000 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4526080 |
Overview of LFE3-95E-6FN1156C – ECP3 Field Programmable Gate Array (FPGA) IC 490 4526080 92000 1156-BBGA
The LFE3-95E-6FN1156C is a member of the LatticeECP3 family of reconfigurable SRAM FPGAs from Lattice Semiconductor Corporation. It combines a high logic capacity fabric with embedded DSP resources, multi-gigabit SERDES capability and flexible source-synchronous I/O to address high-speed and high-integration designs.
Designed for commercial applications and manufactured in a 1156-BBGA (35×35 mm) surface-mount package, this device targets high-volume, high-speed, cost-sensitive systems that require significant on-chip logic, memory and I/O density.
Key Features
- Core Capacity — 92,000 logic elements provide substantial programmable logic for mid-to-large FPGA designs.
- Embedded Memory — Approximately 4.52608 Mbits of on-chip RAM (total RAM bits: 4,526,080) for large buffers, state storage and packet/stream handling.
- DSP Resources — Includes 128 18×18 multipliers and sysDSP architecture support for high-performance multiply-accumulate and signal processing functions.
- High-speed SERDES and I/O — In the 1156-FPBGA (35×35) package the device supports up to 12 SERDES channels and 490 user I/Os, enabling high-bandwidth serial links and dense parallel interfaces.
- Programmable I/O Standards — sysI/O buffer supports a wide range of standards including LVTTL, LVCMOS (3.3/2.5/1.8/1.5/1.2), SSTL, HSTL, LVDS, Bus-LVDS, LVPECL, RSDS and MLVDS for interface flexibility.
- Clocking and Timing — Supports up to ten PLLs and two DLLs for flexible clock generation and deskewing across the device.
- Configuration & System Support — Flexible configuration options include SPI boot, dual-boot image support and on-chip soft error detect; system features in the family include IEEE 1149.1/1532 support, reveal logic analyzer and configuration utilities.
- Power, Mounting & Temperature — Core supply 1.14 V to 1.26 V (1.2 V core supply supported in family), surface-mount package, commercial operating temperature 0 °C to 85 °C, RoHS compliant.
Typical Applications
- Networking & Telecom — Multi-gigabit SERDES and high I/O count support interfaces and protocols such as Ethernet, PCI Express and other high-speed links used in network equipment.
- Video & Broadcast — High-speed serial channels and source-synchronous I/O make the device suitable for SMPTE and other broadcast video transport and processing.
- Signal Processing & Embedded Compute — sysDSP slices and abundant 18×18 multipliers enable FIR filters, FFTs and other DSP-intensive tasks.
- Memory Subsystems & Interface Bridging — Flexible I/O standards and dedicated DDR/DDR2/DDR3 support with DQS make the device useful as a memory controller or protocol bridge.
Unique Advantages
- High Logic Integration: 92,000 logic elements reduce external glue logic and enable greater system consolidation on a single device.
- Substantial On‑Chip Memory: Approximately 4.5 Mbits of embedded RAM cuts external memory dependency for buffering and packet handling.
- Powerful DSP Capability: 128 18×18 multipliers and sysDSP architecture accelerate signal-processing functions while keeping data on-chip.
- Flexible High-Speed I/O: Up to 12 SERDES channels and 490 user I/Os in the 1156 package support dense, high-bandwidth system interfaces.
- Robust System Features: Multiple PLLs/DLLs, configuration options and family-level tools (logic analysis and configuration utilities) streamline development and deployment.
- Commercial‑Grade, RoHS Compliant: Designed for commercial temperature ranges and compliant with RoHS requirements for broad market deployment.
Why Choose LFE3-95E-6FN1156C?
The LFE3-95E-6FN1156C combines high logic and memory density with extensive DSP and high-speed I/O resources, making it well suited to designs that require significant on-chip processing, flexible interfacing and reduced BOM complexity. As a member of the LatticeECP3 family, it inherits system-level features and configuration options that support efficient development and field updates.
This device is a fit for commercial applications that demand scalable performance, configurable I/O standards and integrated SERDES channels—providing a balanced platform for networking, broadcast, signal processing and memory-interface designs.
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