LFE3-95EA-9FN672C

IC FPGA 380 I/O 672FPBGA
Part Description

ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA

Quantity 250 Available (as of October 8, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusNot For New Designs
Manufacturer Standard Lead Time20 Weeks
Datasheet

Specifications & Environmental

Device Package672-FPBGA (27x27)GradeCommercialOperating Temperature0°C – 85°C
Package / Case672-BBGANumber of I/O380Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs11500Number of Logic Elements/Cells92000
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits4526080

Overview of LFE3-95EA-9FN672C – ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA

The LFE3-95EA-9FN672C is an ECP3 family FPGA from Lattice Semiconductor, delivered in a 672-ball FPBGA surface-mount package (27 × 27 mm). This commercial-grade FPGA provides a balance of logic capacity, embedded memory and high-density I/O suitable for mid- to high-performance commercial systems.

Designed for applications that require flexible programmable logic, high-speed serial links and sizable on-chip RAM, the device integrates approximately 92,000 logic elements, 380 user I/Os and approximately 4.53 Mbits of total on-chip RAM while operating from a 1.14 V to 1.26 V core supply.

Key Features

  • Logic Capacity — Approximately 92,000 logic elements to implement complex programmable logic and control functions for system integration.
  • Embedded Memory — Total on-chip RAM of 4,526,080 bits (approximately 4.53 Mbits) for buffering, packet processing or frame storage.
  • I/O Density and Standards — 380 user I/Os with programmable sysI/O buffer support for a wide range of interfaces and on-chip termination options.
  • High-Speed SERDES — Family-level SERDES capability spanning 150 Mbps to 3.2 Gbps and multi-channel support for protocols such as PCI Express, Ethernet, SONET/SDH, CPRI and Serial RapidIO.
  • Enhanced DSP Resources (sysDSP) — Series-level sysDSP slice architecture for high-performance multiply-accumulate and arithmetic operations suitable for signal processing tasks.
  • Clocking and Timing — Multiple PLLs and DLLs are available in the family for flexible clock management and system timing.
  • Configuration and System Support — Flexible device configuration options including SPI boot, dual-boot images and support tools such as on-chip oscillator and configuration utilities described in the family datasheet.
  • Package, Power and Temperature — 672-FPBGA (27 × 27 mm) surface-mount package; core supply 1.14 V to 1.26 V; commercial operating range 0 °C to 85 °C. RoHS compliant.

Typical Applications

  • High-Speed Communications — Use the device’s embedded SERDES and multi-protocol support for networking equipment, line cards and transport interfaces requiring serial links and protocol bridging.
  • Signal Processing and Video — Leverage sysDSP slices and on-chip RAM for real-time DSP tasks such as video processing, image scaling and waveform manipulation.
  • Memory Interface and Buffering — Implement DDR/DDR2/DDR3 memory controllers and on-chip buffering using the device’s memory resources and dedicated I/O features for data staging and packet handling.
  • Embedded Control and I/O Aggregation — Consolidate control logic, protocol adaptation and peripheral interfacing in a single FPGA for commercial embedded systems and instrumentation.

Unique Advantages

  • Well-balanced integration: Combines a high logic element count with substantial on-chip RAM and dense I/O to reduce external components and simplify board-level design.
  • High-density I/O in a compact package: 380 user I/Os in a 672-pin FPBGA allows dense I/O mapping while preserving a 27 × 27 mm footprint.
  • Serial protocol flexibility: Family SERDES capability and protocol support enable deployment across a range of serial link applications without redesigning the physical layer.
  • Commercial temperature suitability: Rated for 0 °C to 85 °C operation, matching standard commercial electronics deployment scenarios.
  • Configurable system features: On-chip oscillator, SPI boot and dual-boot configuration options support flexible system initialization and field updates.

Why Choose LFE3-95EA-9FN672C?

The LFE3-95EA-9FN672C positions itself as a versatile commercial-grade FPGA that balances sizable logic resources, multi-megabit on-chip RAM and high I/O density in a compact 672-FPBGA package. It is well-suited for designers who need programmable logic, embedded memory and high-speed serial connectivity within a single, package-constrained solution.

As part of the Lattice ECP3 family, this device benefits from series-level features such as sysDSP slices, flexible clock management, and configuration utilities, enabling scalable designs and supporting common commercial system-level requirements.

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