LFSC3GA115E-6FFN1152C
| Part Description |
SC Field Programmable Gate Array (FPGA) IC 660 7987200 115000 1152-BBGA |
|---|---|
| Quantity | 283 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1152-FPBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1152-BBGA | Number of I/O | 660 | Voltage | 950 mV - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 28750 | Number of Logic Elements/Cells | 115000 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 7987200 |
Overview of LFSC3GA115E-6FFN1152C – SC Field Programmable Gate Array (FPGA) IC 660 I/Os, ~7.99 Mbits, 115,000 Logic Elements, 1152-BBGA
The LFSC3GA115E-6FFN1152C is a high-density, commercial-grade FPGA from the Lattice SC family designed for complex digital and high-bandwidth interface designs. It delivers 115,000 logic elements, a high I/O count, and substantial on-chip memory to address communication, protocol bridging, and memory‑intensive embedded applications.
Built on the Lattice SC/M family architecture, this device combines dense logic, large embedded RAM, and a comprehensive I/O and clocking feature set that suits networking equipment, multi-protocol interfaces, and advanced system controllers requiring a balance of performance and integration.
Key Features
- High Logic Density 115,000 logic elements provide significant programmable fabric for complex state machines, protocol engines, and custom accelerators.
- Large Embedded Memory Approximately 7.99 Mbits of on-chip RAM for frame buffering, packet queues, and memory‑intensive processing.
- Extensive I/O Count 660 I/Os for broad interfacing to transceivers, memory, and peripherals across multiple bus standards.
- Family-Level High-Speed SERDES and I/O Capabilities The Lattice SC/M family includes high-speed SERDES (family-support for multi-gigabit links) and 2 Gbps PURESPEED™ I/O capabilities for demanding serial and memory interfaces.
- Advanced Clocking Family-level features include multi‑PLL/DLL clock networks supporting high‑performance internal and I/O‑connected clocks (family support up to 700 MHz global clocks and 1 GHz edge clocks).
- Power and Supply Core supply range specified at 0.95 V to 1.26 V to match modern low-voltage system architectures.
- Package and Mounting 1152-BBGA (supplier package: 1152-FPBGA, 35×35) in a surface-mount form factor for high-pin-count board designs.
- Commercial Temperature Grade Rated for operation from 0 °C to 85 °C for standard commercial deployment.
- RoHS Compliant Meets RoHS environmental requirements for lead‑free manufacturing.
Typical Applications
- High‑Speed Networking Equipment Ideal for packet processing, protocol bridging and interface aggregation where high logic density and on‑chip memory reduce external buffering needs.
- Telecommunications and Backhaul Supports implementation of SERDES‑based physical layers and protocol PCS blocks for multi‑gigabit links and telecom interfaces.
- Memory‑Intensive Embedded Systems Large embedded RAM and distributed memory make it suited for buffering, FIFO management, and dataflow acceleration.
- Custom Interface and Protocol Engines High I/O count and configurable fabric enable bespoke interface controllers, bridging, and glue logic for complex systems.
Unique Advantages
- Highly Integrated Logic and Memory: 115,000 logic elements combined with approximately 7.99 Mbits of on‑chip RAM reduce reliance on external components and simplify board design.
- Broad I/O Resource: 660 I/Os provide flexibility to support multiple parallel interfaces and high‑pin‑count subsystems without external multiplexing.
- Scalable Clocking and Timing: Family-level PLL/DLL clocking resources support high-frequency internal and I/O timing requirements for synchronous designs.
- Low-Voltage Core Operation: Core supply between 0.95 V and 1.26 V helps align with modern low-voltage system rails and power budgets.
- High‑Pin‑Count, Surface‑Mount Packaging: 1152-BBGA (35×35) provides the routing density needed for complex board layouts while maintaining a compact footprint.
- RoHS Compliance: Supports lead‑free assembly processes and regulatory environmental requirements.
Why Choose LFSC3GA115E-6FFN1152C?
The LFSC3GA115E-6FFN1152C combines a high logic element count, substantial embedded memory, and a large I/O complement in a commercial-grade FPGA package, delivering a balanced platform for communication-focused and memory‑intensive designs. Its family heritage provides advanced clocking and SERDES/I/O capabilities that align with multi‑protocol, high‑bandwidth applications.
This device is well suited to engineering teams building networking gear, protocol adapters, or systems that require high integration to minimize external components and streamline board complexity. With its package density, low‑voltage operation, and RoHS compliance, it provides a practical, scalable option for production deployments in commercial environments.
Request a quote or submit a purchase inquiry to receive pricing and availability for LFSC3GA115E-6FFN1152C. Our team can assist with lead times, volume pricing, and technical questions to support your design and procurement process.

Date Founded: 1983
Headquarters: Hillsboro, Oregon, USA
Employees: 1,000+
Revenue: $627.7 Million
Certifications and Memberships: ISO9001:2015, ISO14001:2015, IATF16949:2016