LFSCM3GA115EP1-5FFN1152C
| Part Description |
SCM Field Programmable Gate Array (FPGA) IC 660 7987200 115000 1152-BBGA |
|---|---|
| Quantity | 1,573 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1152-FPBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1152-BBGA | Number of I/O | 660 | Voltage | 950 mV - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 28750 | Number of Logic Elements/Cells | 115000 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 7987200 |
Overview of LFSCM3GA115EP1-5FFN1152C – SCM Field Programmable Gate Array, 115,000 logic elements, 660 I/Os
The LFSCM3GA115EP1-5FFN1152C is a high-density SCM family FPGA from Lattice Semiconductor Corporation built for memory- and interface-intensive systems. It combines a high-performance FPGA fabric with substantial embedded memory and extensive I/O capability to support high-speed serial links and complex protocol implementations.
Designed for communications and networking applications, the device delivers a mix of programmable logic (115,000 logic elements), approximately 7.99 Mbits of on-chip RAM, and up to 660 I/Os in a 1152-BBGA package, offering a compact, integrated platform for demanding digital designs.
Key Features
- High-density logic — 115,000 logic elements suitable for large, complex FPGA designs and system-level integration.
- Embedded memory — Approximately 7.99 Mbits of total on-chip RAM to support data buffering, packet processing, and memory-intensive logic.
- Extensive I/O — 660 I/O pins supporting a wide range of electrical standards including LVCMOS (3.3/2.5/1.8/1.5/1.2 V), LVTTL, SSTL, HSTL, PCI, LVDS and others for flexible system interfacing.
- High-speed SERDES and flexiPCS — 4 to 32 high-speed SERDES channels per device with line rates from 600 Mbps to 3.8 Gbps, integrated pre-emphasis and equalization, and embedded PCS for standards such as GbE, XAUI, PCI Express, SONET and Fibre Channel.
- Advanced clocking — Multiple analog PLLs and DLLs with global and edge clock support (700 MHz global clock; 1 GHz edge clocks) for precise timing and high-performance clock distribution.
- Package and mounting — 1152-BBGA (Supplier package: 1152-FPBGA 35×35) surface-mount package for high pin-count applications.
- Power and supply — Core supply range from 950 mV to 1.26 V, enabling modern low-voltage system designs.
- Commercial temperature grade — Operating range 0 °C to 85 °C suitable for commercial applications.
- Standards and system support — Built-in support for common system-level protocols and features such as IEEE 1149.1 boundary scan, in-system configuration, and embedded logic analysis.
Typical Applications
- High-speed networking equipment — Implement Ethernet, XAUI, SONET, and other network protocols using the device’s SERDES, flexiPCS, and abundant logic resources.
- Protocol bridging and packet processing — Use the large embedded RAM and dense logic fabric for buffering, packet classification, and protocol conversion tasks.
- Storage and interface controllers — Support Fibre Channel and PCI Express endpoints or bridges leveraging the SERDES capabilities and protocol IP.
- Telecom and carrier systems — Deploy in systems that require multiple high-speed serial links, deterministic clocking, and integrated PCS functionality.
Unique Advantages
- Highly integrated platform: Combines 115,000 logic elements, large on-chip RAM, and 660 I/Os in a single 1152-BBGA package to reduce board-level complexity and BOM count.
- Scalable serial connectivity: 4–32 SERDES channels with integrated PCS and signal conditioning let designers scale link counts and data rates without external PHYs.
- Deterministic high-speed timing: Extensive PLL and DLL resources with support for 700 MHz global and 1 GHz edge clocks enable precise timing for high-performance designs.
- Flexible I/O standards: Broad support for single-ended and differential I/O standards enables interfacing with diverse memory, signaling, and legacy interfaces.
- Optimized for memory-heavy logic: Nearly 8 Mbits of embedded RAM and additional distributed RAM options provide the capacity needed for deep buffering and stateful processing.
- Commercial-grade readiness: Specified 0 °C to 85 °C operating range and RoHS compliance for standard commercial deployments.
Why Choose LFSCM3GA115EP1-5FFN1152C?
The LFSCM3GA115EP1-5FFN1152C positions itself as a compact, high-performance FPGA for system designers who need a balance of dense logic, substantial on-chip memory, and extensive high-speed I/O. Its combination of up to 32 SERDES lanes, flexible I/O standards, and advanced clocking resources makes it well suited to networking, telecom, and protocol-bridging applications where integration and deterministic timing matter.
For teams building scalable, memory- and interface-centric systems, this FPGA delivers the programmable resources and serial connectivity to simplify board design, reduce external components, and accelerate time-to-market while operating within standard commercial temperature ranges.
Request a quote or submit a project quote for LFSCM3GA115EP1-5FFN1152C to receive pricing and lead-time information for your design needs.

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