ORT8850H-2BMN680C
| Part Description |
ORCA® 4 Field Programmable Gate Array (FPGA) IC 297 151552 16192 680-BBGA |
|---|---|
| Quantity | 910 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 680-FPBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 680-BBGA | Number of I/O | 297 | Voltage | 1.425 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2024 | Number of Logic Elements/Cells | 16192 | ||
| Number of Gates | 899000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 151552 |
Overview of ORT8850H-2BMN680C – ORCA® 4 Field Programmable Gate Array (FPGA) IC 297 151552 16192 680-BBGA
The ORT8850H-2BMN680C is an ORCA® ORT8850 Field-Programmable System Chip (FPSC) that integrates high-speed backplane transceivers with programmable FPGA logic. The device combines an eight-channel backplane SERDES (each channel up to 850 Mbits/s) and built-in clock-and-data recovery with a sizeable FPGA fabric for network, communications and high-speed board-to-board interface applications.
Designed for commercial-grade systems, this ORT8850H variant provides 16,192 logic elements, approximately 151,552 bits of embedded memory, and 297 user I/Os in a 680-ball FBGA package, enabling compact, high-density designs that require programmable protocol handling and backplane connectivity.
Key Features
- Integrated FPSC architecture Combines FPGA logic with an eight-channel backplane transceiver and built-in Clock and Data Recovery (CDR) for clockless high-speed links.
- High-speed serial channels Eight SERDES channels supporting up to 850 Mbits/s per channel (aggregate up to 6.8 Gbits/s when all channels are used).
- FPGA capacity 16,192 logic elements and approximately 899,000 system gates for protocol logic, custom processing, and interface control.
- On-chip memory Approximately 151,552 bits of embedded RAM to support framers, buffers and temporary data storage.
- I/O density 297 user I/Os to support diverse peripheral interfaces, bus connections and system integration points.
- Package and mounting 680-ball FPBGA (35 × 35 mm) surface-mount package for high-density board layouts.
- Power and temperature Operates from 1.425 V to 3.6 V and specified for commercial temperature range (0 °C to 70 °C).
- Compliance RoHS-compliant for lead-free manufacturing processes.
Typical Applications
- Backplane transceiver and network termination Use the built-in eight-channel SERDES and SONET framing features to implement backplane links and network termination functions.
- High-speed board-to-board communication Clockless high-speed interface with CDR supports board-level interconnects and multiboard clock-domain interoperability.
- Protocol and packet processing FPGA fabric and embedded memory accommodate protocol-independent framers, ATM/PoS framers and HDLC/IP framing logic.
- High-throughput bridging Implement high-speed bridges (for example, PCI-to-PCI half-bridge architectures) using the programmable logic and SERDES channels.
Unique Advantages
- Highly integrated FPSC Merges SERDES-based backplane transceivers with FPGA logic to reduce component count and simplify system-level design.
- Deterministic high-speed links Eight channels at up to 850 Mbits/s enable deterministic aggregate bandwidth up to 6.8 Gbits/s for demanding data paths.
- Substantial programmable capacity 16,192 logic elements and ~899,000 system gates provide ample resources for complex protocol and data-processing tasks.
- Rich I/O and memory resources 297 I/Os and approximately 151,552 bits of embedded RAM support flexible interfacing and buffering needs.
- Compact, production-ready package 680-FPBGA (35 × 35 mm) surface-mount package balances density and manufacturability for commercial applications.
- RoHS compliant Supports lead-free manufacturing and regulatory compliance for commercial products.
Why Choose ORT8850H-2BMN680C?
The ORT8850H-2BMN680C positions itself as a versatile Field-Programmable System Chip for designers who need tightly integrated high-speed serial connectivity and programmable logic in a single device. With eight SERDES channels, built-in CDR, a large FPGA fabric and extensive I/O, it is well suited for communications equipment, backplane interfaces, and custom protocol implementations in commercial systems.
Choose this device when your design requires a compact, programmable transceiver solution that combines protocol handling, framing, and user logic in a single package—delivering scalability and reduced board-level complexity while aligning with RoHS requirements and common commercial operating conditions.
Request a quote or contact our sales team to discuss availability, pricing, and how ORT8850H-2BMN680C can be integrated into your next design.