XCV200-6BG352C
| Part Description |
Virtex® Field Programmable Gate Array (FPGA) IC 260 57344 5292 352-LBGA Exposed Pad, Metal |
|---|---|
| Quantity | 431 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | AMD |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 352-MBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 352-LBGA Exposed Pad, Metal | Number of I/O | 260 | Voltage | 2.375 V - 2.625 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1176 | Number of Logic Elements/Cells | 5292 | ||
| Number of Gates | 236666 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 57344 |
Overview of XCV200-6BG352C – Virtex® Field Programmable Gate Array (FPGA), 352-LBGA Exposed Pad
The XCV200-6BG352C is a commercial-grade Virtex® FPGA IC from AMD designed for high-density, reprogrammable logic applications. It combines a scalable SRAM-based Virtex architecture with on-chip embedded memory and a rich I/O complement to support complex digital systems requiring flexible logic, memory, and clock-management resources.
Typical targets include PCI and Compact PCI-based systems and other applications that benefit from compact surface-mount packaging and reprogrammability. The device offers a balance of logic capacity, embedded RAM, and I/O count while operating within a 2.375 V to 2.625 V supply range and a 0 °C to 85 °C commercial temperature window.
Key Features
- Logic Capacity — Approximately 5,292 logic elements and 236,666 system gates enable medium-density programmable logic implementations.
- Embedded Memory — Approximately 57,344 bits (≈57 kbits) of on-chip RAM for LUT-based and block RAM implementations suited to buffering, small data stores, and control structures.
- I/O and Interfaces — 260 available I/O pins provide a broad interface capability for external devices and system interconnects; the device is specified as 66-MHz PCI compliant in its product family documentation.
- Clock Management — Built-in clock-management resources, including four dedicated delay-locked loops (DLLs) and multiple global/local clock distribution nets, for precise clock control and low-skew distribution.
- Configuration and Reprogrammability — SRAM-based in-system configuration with unlimited reprogrammability and support for multiple programming modes as described in the Virtex family documentation.
- Package and Mounting — 352-LBGA exposed pad metal package (supplier package 352-MBGA, 35×35) in a surface-mount form factor for compact board-level integration and thermal conduction through the exposed pad.
- Power and Process — Specified operating supply range of 2.375 V to 2.625 V; manufactured on a 0.22 µm, 5-layer-metal CMOS process as indicated in the Virtex family specification.
- Commercial Grade and Compliance — Commercial temperature grade (0 °C to 85 °C) and RoHS compliant.
Typical Applications
- PCI and Compact PCI Systems — Use as programmable logic and interface glue in PCI-compliant designs and hot-swappable Compact PCI modules where reprogrammability and moderate logic density are needed.
- Embedded Control and Custom Logic — Implement control engines, protocol converters, and custom state machines leveraging the device’s logic elements and embedded RAM.
- Memory Interface Support — Serve as a high-performance logic front end for external RAM devices with fast interfaces and configurable memory structures.
- Clock-Intensive Designs — Applications needing multiple clock domains and tight clock skew control can benefit from the on-chip DLLs and hierarchical clock distribution.
Unique Advantages
- Reprogrammable Flexibility: SRAM-based architecture provides unlimited in-system reprogramming to iterate or field-upgrade designs without hardware changes.
- Balanced Integration: Combines mid-range logic density with substantial I/O and embedded RAM, reducing external glue logic and simplifying board-level design.
- Compact Packaging: 352-LBGA exposed pad package enables high-density board placement and effective thermal conduction for surface-mount assemblies.
- Clock and Interface Support: Multiple DLLs and a rich I/O complement support complex timing architectures and diverse interface standards outlined in the Virtex family documentation.
- Commercial Temperature and RoHS Compliance: Suitable for commercial applications with standardized environmental compliance.
Why Choose XCV200-6BG352C?
The XCV200-6BG352C delivers a practical combination of logic resources, embedded memory, and I/O capacity in a compact 352-LBGA surface-mount package. It is well suited for designers who need reprogrammable, medium-density FPGA capability with robust clock management and multiple configuration options. As a commercial-grade, RoHS-compliant Virtex device, it fits applications where field reconfiguration, moderate performance, and compact integration are priorities.
Request pricing and availability or submit a quote to evaluate the XCV200-6BG352C for your next programmable logic design.

Date Founded: 1969
Headquarters: Santa Clara, California, USA
Employees: 25,000+
Revenue: $22.68 Billion
Certifications and Memberships: ISO9001:2015, RoHS, REACH








