M55D4G32128A-EEBIG2R

4Gb LPDDR3 SDRAM Ind.
Part Description

LPDDR3 SDRAM 4Gb (128Mbx32) 933MHz 1.8V/1.2V 178-BGA Industrial Grade, Pb-free

Quantity 615 Available (as of May 5, 2026)
Product CategoryMemory
ManufacturerESMT
Manufacturing StatusMP
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package178-BGA (10x11.5)Memory FormatDRAMTechnologyDRAM
Memory Size4 GbitAccess Time5.5 nsGradeIndustrial
Clock Frequency933 MHzVoltage1.14V ~ 1.30V, 1.70V ~ 1.95VMemory TypeVolatile
Operating Temperature-40°C – 85°CWrite Cycle Time Word Page15 nsPackaging178-BGA
Mounting MethodSurface MountMemory InterfaceParallelMemory Organization128M x 32
Moisture Sensitivity Level3RoHS ComplianceCompliantREACH ComplianceREACH Unknown
QualificationJEDECECCNEAR99HTS Code8542.32.00.36

Overview of M55D4G32128A-EEBIG2R – LPDDR3 SDRAM 4Gb (128Mbx32) 933MHz 1.8V/1.2V 178-BGA Industrial Grade, Pb-free

The M55D4G32128A-EEBIG2R is a JEDEC-compliant LPDDR3 SDRAM device providing 4.295 Gbit organized as 128M × 32 with an internal architecture of 16M words × 32 bits × 8 banks. It delivers a 933 MHz clock (1866 Mb/s per pin data rate) in a compact 178-ball BGA, optimized for industrial-grade applications.

Designed with ultra-low-voltage core and I/O supplies and a wide operating temperature range of −40°C to 85°C, this device targets embedded and industrial systems that require high-bandwidth memory, deterministic timing options, and robust power-management features.

Key Features

  • Memory Architecture  4.295 Gbit capacity organized as 128M × 32 with eight internal banks (16M × 32 × 8), 4KB page size, and an eight-bit prefetch DDR architecture.
  • Performance  933 MHz clock providing 1866 Mb/s per pin data rate, selectable read latencies (RL options include 3, 6, 8, 9, 10, 11, 12, 14, 16) and Burst Length = 8 for sustained high-throughput transfers.
  • Power  Ultra-low-voltage core and I/O supplies with VDD1 = 1.70–1.95 V and VDD2 / VDDCA / VDDQ = 1.14–1.30 V, supporting low-power operation and deep power-down modes.
  • Interface & Timing  Double data rate command/address inputs, bidirectional/differential DQS per byte, differential clock inputs (CK_t/CK_c), CA training and write leveling for timing adjustment, and an interface labeled HSUL_12.
  • Reliability & Refresh  JEDEC LPDDR3-compliant refresh features including auto refresh, self refresh, per-bank refresh for concurrent operation, Auto Temperature Compensated Self Refresh (ATCSR), Partial-Array Self Refresh (PASR), and bank/segment masking.
  • System Controls & Options  Supports on-die termination (ODT), programmable drive strength (DS), data mask (DM), auto precharge options, and deep power-down (DPD) for flexible system power management.
  • Package & Environmental  Pb-free 178-ball BGA (10 × 11.5 mm) surface-mount package rated for industrial operating temperature −40°C to 85°C and JEDEC qualification.
  • Timing Characteristics  Typical access time 5.5 ns and write cycle time (word page) 15 ns as documented in the device specification.

Typical Applications

  • Industrial Systems  Industrial-grade embedded controllers and automation equipment requiring memory rated for −40°C to 85°C operation and JEDEC LPDDR3 compatibility.
  • Embedded Computing  LPDDR3-compliant system memory for SoCs and modules that need a 4Gb, 128M × 32 organization with high data throughput.
  • Compact Board-Level Designs  High-density 178-BGA (10×11.5 mm) package useful for space-constrained PCBs where surface-mount BGA integration is required.
  • Low-Power Designs  Systems leveraging ultra-low-voltage core and I/O supplies and deep power-down/self-refresh capabilities to manage power across operating modes.

Unique Advantages

  • JEDEC LPDDR3 Compliance: Ensures compatibility with LPDDR3 host controllers and simplifies integration into LPDDR3-based system designs.
  • Industrial Temperature Range: Specified for −40°C to 85°C operation, making the device suitable for harsh environments and extended-temperature deployments.
  • High Data Rate in a Compact Package: 933 MHz (1866 Mb/s per pin) performance in a 178-ball BGA provides high bandwidth without sacrificing board space.
  • Comprehensive Power Management: Multiple low-voltage rails, deep power-down, ATCSR and PASR support enable flexible power-saving strategies for embedded systems.
  • Robust Timing and Training Features: CA training, write leveling, selectable RL/WL values, and ODT/programmable drive strength help tune timing and signal integrity in complex designs.
  • Lead-Free, Surface-Mount Packaging: Pb-free 178-BGA supports modern assembly processes and compact, high-density board layouts.

Why Choose M55D4G32128A-EEBIG2R?

The M55D4G32128A-EEBIG2R positions itself as a high-bandwidth, industrial-grade LPDDR3 memory device for embedded and industrial applications that demand JEDEC compliance, robust timing controls, and wide temperature operation. Its combination of 4.295 Gbit capacity, 933 MHz clocking (1866 Mb/s per pin), and advanced power-management features supports designs that require both performance and predictable behavior across temperature extremes.

Manufactured by ESMT and delivered in a compact Pb-free 178-BGA surface-mount package, this part is suited for system designers seeking a dense, JEDEC-compliant LPDDR3 memory solution with explicit support for timing training, per-bank refresh, and deep power states to optimize system power and reliability.

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