MT46V16M16P-5B:K TR

IC DRAM 256MBIT PARALLEL 66TSOP
Part Description

IC DRAM 256MBIT PARALLEL 66TSOP

Quantity 1,179 Available (as of May 6, 2026)
Product CategoryMemory
ManufacturerMicron Technology Inc.
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package66-TSOPMemory FormatDRAMTechnologySDRAM - DDR
Memory Size256 MbitAccess Time700 psGradeCommercial
Clock Frequency200 MHzVoltage2.5V ~ 2.7VMemory TypeVolatile
Operating Temperature0°C ~ 70°C (TA)Write Cycle Time Word Page15 nsPackaging66-TSSOP (0.400", 10.16mm Width)
Mounting MethodVolatileMemory InterfaceParallelMemory Organization16M x 16
Moisture Sensitivity Level3 (168 Hours)RoHS ComplianceROHS CompliantREACH ComplianceREACH Unaffected
QualificationN/AECCNEAR99HTS Code8542.32.0024

Overview of MT46V16M16P-5B:K TR – IC DRAM 256MBIT PARALLEL 66TSOP

The MT46V16M16P-5B:K TR is a 256 Mbit Double Data Rate (DDR) SDRAM organized as 16M × 16 with a parallel memory interface in a 66-pin TSSOP package. It implements an internal pipelined DDR architecture with source-synchronous data capture and is intended for board-level memory applications operating in the commercial temperature range (0°C to 70°C).

Designed for high-rate parallel memory access, this device targets systems requiring 2.5V-class DDR operation with up to 200 MHz clocking (DDR transfers) and features timing and I/O primitives to support reliable, byte-granular data transfers.

Key Features

  • DDR architecture Internal, pipelined double-data-rate operation delivering two data accesses per clock cycle and differential clock inputs (CK, CK#).
  • Memory organization 256 Mbit capacity configured as 16M × 16 with four internal banks for concurrent operation.
  • Performance and timing Speed grade -5B supports up to 200 MHz clock (DDR transfers), with an access window and data-out characteristics consistent with DDR timing; typical access-time parameter listed as 700 ps and write cycle time (word page) of 15 ns.
  • Data strobes and masks Bidirectional data strobe (DQS) transmitted/received with data; x16 devices include two DQS (one per byte). Data mask (DM) available (x16 has two – one per byte) for write masking.
  • Voltage and I/O VDD / VDDQ nominal operation in the 2.5 V range (specified 2.5 V ±0.2 V and documented DDR400 option at 2.6 V ±0.1 V). I/O implemented for SSTL_2-compatible signaling.
  • Refresh and power modes Supports auto refresh (8K refresh count) and self-refresh options as described in the product datasheet.
  • Package and thermal 66-pin TSSOP (0.400", 10.16 mm width) package; rated for commercial ambient operation from 0°C to +70°C (TA).

Typical Applications

  • Board-level memory expansion Used where a compact 66-TSSOP DDR SDRAM is required to provide 256 Mbit of parallel DRAM on system boards.
  • Commercial embedded systems Memory for devices and subsystems operating in the 0°C to 70°C temperature range that require DDR performance and burst access modes.
  • High-rate parallel memory interfaces Suitable for designs leveraging source-synchronous DQS capture and programmable burst lengths (2, 4, 8) for block transfers.

Unique Advantages

  • High-speed DDR transfers: Speed grade -5B enables operation up to 200 MHz (DDR transfers) to support higher data throughput compared with single-edge SDR designs.
  • Byte-level strobe and mask: Two DQS and two DM signals on x16 provide per-byte source-synchronous capture and write masking for improved data alignment and control.
  • Robust timing options: Programmable burst lengths (2, 4, 8) and DLL alignment of DQ/DQS transitions with CK enable flexible data-transfer schemes and timing margin tuning.
  • Compact board footprint: 66-TSSOP (10.16 mm width) package allows integration into space-constrained PCBs while maintaining pinout for parallel DDR operation.
  • Standard voltage domain: 2.5 V-class supply and SSTL_2-compatible I/O simplify integration into systems using established DDR signaling levels.

Why Choose MT46V16M16P-5B:K TR?

The MT46V16M16P-5B:K TR offers a compact, parallel DDR SDRAM solution providing 256 Mbit capacity with a 16M × 16 organization and internal features—such as DQS, DLL alignment, four internal banks, and programmable burst lengths—that support predictable, high-rate data transfers. Its 66-TSSOP package and commercial temperature rating make it suitable for board-level memory applications where space and standard 2.5 V DDR signaling are required.

Designers needing a straightforward DDR memory building block for commercial embedded systems or memory subsystems can leverage this device’s timing options, byte-level strobes/masks, and refresh capabilities to implement reliable parallel DRAM interfaces.

Request a quote or submit a pricing and availability inquiry to receive more information and support for integrating the MT46V16M16P-5B:K TR into your design.

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