MT46V32M8P-6T:GTR
| Part Description |
IC DRAM 256MBIT PAR 66TSOP |
|---|---|
| Quantity | 669 Available (as of May 5, 2026) |
| Product Category | Memory |
|---|---|
| Manufacturer | Micron Technology Inc. |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 66-TSOP | Memory Format | DRAM | Technology | SDRAM - DDR | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 256 Mbit | Access Time | 700 ps | Grade | Commercial | ||
| Clock Frequency | 167 MHz | Voltage | 2.3V ~ 2.7V | Memory Type | Volatile | ||
| Operating Temperature | 0°C ~ 70°C (TA) | Write Cycle Time Word Page | 15 ns | Packaging | 66-TSSOP (0.400", 10.16mm Width) | ||
| Mounting Method | Volatile | Memory Interface | Parallel | Memory Organization | 32M x 8 | ||
| Moisture Sensitivity Level | 3 (168 Hours) | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.0024 |
Overview of MT46V32M8P-6T:GTR – IC DRAM 256MBIT PAR 66TSOP
The MT46V32M8P-6T:GTR is a 256 Mbit, volatile DDR SDRAM organized as 32M × 8 with a parallel memory interface in a 66-TSSOP package. It implements a double-data-rate internal pipeline with source-synchronous DQS to provide two data accesses per clock cycle.
Designed for commercial-temperature systems, this device targets applications that require compact, parallel DDR memory with a 2.5V I/O signaling option and an extended TSOP footprint for board-level integration.
Key Features
- Core / Architecture Double Data Rate (DDR) SDRAM with an internal pipelined DDR architecture enabling two data accesses per clock cycle; four internal banks for concurrent operation.
- Memory Organization & Capacity 256 Mbit capacity organized as 32M × 8 with programmable burst lengths (BL = 2, 4, or 8).
- Performance & Timing Rated for a 167 MHz clock frequency (6T timing grade) with an access time of 700 ps and a write cycle time (word page) of 15 ns.
- Interface & Signaling Parallel memory interface with bidirectional data strobe (DQS) and differential clock inputs (CK / CK#); 2.5 V I/O (SSTL_2-compatible).
- Power Supply voltage range 2.3 V to 2.7 V; datasheet references VDD = +2.5 V ±0.2 V and VDDQ = +2.5 V ±0.2 V for standard operation.
- Refresh & Power Management Supports auto-refresh (8K refresh cycles) and self-refresh (not available on AT devices as noted in the datasheet).
- Package & Temperature 66-pin TSSOP (0.400", 10.16 mm width) package; commercial operating temperature 0°C to +70°C.
Typical Applications
- Commercial embedded systems — Provides a compact parallel DDR memory option for commercial designs that operate within the 0°C to +70°C temperature range.
- Consumer electronics — Serves as on-board DRAM for devices requiring 256 Mbit of DDR memory in a 66-TSSOP footprint.
- Communications and networking equipment — Suitable for memory subsystems that use a parallel DDR SDRAM interface and SSTL_2-compatible signaling.
Unique Advantages
- DDR architecture with source-synchronous DQS: Enables two data transfers per clock and aligns data capture using bidirectional DQS for reliable high-speed operation.
- Compact TSOP footprint: 66-TSSOP package (10.16 mm width) provides a board-friendly form factor for constrained layouts while offering a longer-lead TSOP option for improved reliability as noted in the datasheet.
- Matched signaling levels: 2.5 V I/O (SSTL_2-compatible) simplifies integration with memory subsystems that require SSTL_2 signaling.
- Deterministic timing: 6T speed grade with 167 MHz clock rating and documented access/write timings supports predictable performance budgeting in system designs.
- Standard commercial temperature rating: Specified for 0°C to +70°C operation for commercial applications.
Why Choose MT46V32M8P-6T:GTR?
The MT46V32M8P-6T:GTR offers a straightforward 256 Mbit DDR SDRAM solution combining a parallel DDR architecture, source-synchronous DQS, and a compact 66-TSSOP package. Its documented timing (167 MHz rating, 700 ps access time, 15 ns write cycle) and SSTL_2-compatible I/O make it appropriate for designs that require predictable DDR performance in a commercial temperature range.
Manufactured by Micron Technology, Inc., this device is suited for teams specifying a 32M × 8 DDR memory element in board-level applications where package footprint, supply voltage (2.3 V–2.7 V), and timing determinism are primary selection criteria.
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