W9412G6KH-4 TR

IC DRAM 128MBIT SSTL2 66TSOP II
Part Description

IC DRAM 128MBIT SSTL2 66TSOP II

Quantity 1,147 Available (as of May 5, 2026)
Product CategoryMemory
ManufacturerWinbond Electronics
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package66-TSOP IIMemory FormatDRAMTechnologySDRAM - DDR
Memory Size128 MbitAccess Time48 nsGradeCommercial
Clock Frequency250 MHzVoltage2.4V ~ 2.7VMemory TypeVolatile
Operating Temperature0°C ~ 70°C (TA)Write Cycle Time Word Page12 nsPackaging66-TSSOP (0.400", 10.16mm Width)
Mounting MethodVolatileMemory InterfaceSSTL_2Memory Organization8M x 16
Moisture Sensitivity Level3 (168 Hours)RoHS ComplianceROHS CompliantREACH ComplianceREACH Unaffected
QualificationN/AECCNEAR99HTS Code8542.32.0002

Overview of W9412G6KH-4 TR – IC DRAM 128MBIT SSTL2 66TSOP II

The W9412G6KH-4 TR is a 128 Mbit volatile DRAM device implemented in DDR SDRAM technology with an SSTL_2 memory interface. It is organized as 8M × 16 and specified to operate at up to a 250 MHz clock frequency.

This device provides defined timing and electrical characteristics—including a 48 ns access time, 12 ns write cycle time (word/page), and a 2.4 V–2.7 V supply range—suitable for designs that require a compact, SSTL_2-compatible DDR memory element within the stated thermal and voltage limits.

Key Features

  • Memory Type & Architecture DDR SDRAM technology; volatile DRAM with a 128 Mbit capacity organized as 8M × 16.
  • Performance Supports a clock frequency of 250 MHz, with a 48 ns access time and a 12 ns write cycle time (word/page).
  • Interface SSTL_2 memory interface for compatible signaling requirements.
  • Power Voltage supply range of 2.4 V to 2.7 V.
  • Package & Mounting 66-TSSOP (66-TSOP II) surface-mount package, 0.400" (10.16 mm) width.
  • Operating Conditions Specified ambient operating temperature range of 0°C to 70°C (TA).

Unique Advantages

  • Compact TSOP II package: 66-TSSOP (0.400", 10.16 mm) footprint facilitates space-efficient PCB layouts.
  • DDR SDRAM with SSTL_2 signaling: Provides synchronous DDR architecture with an SSTL_2 interface for systems designed to that signaling standard.
  • Defined timing parameters: 250 MHz clock, 48 ns access time and 12 ns write cycle time supply predictable timing for memory subsystem design.
  • Low-voltage operation: 2.4 V–2.7 V supply supports designs constrained to that voltage range.
  • Straightforward memory mapping: 8M × 16 organization and 128 Mbit capacity simplify addressing and integration with compatible memory controllers.

Why Choose IC DRAM 128MBIT SSTL2 66TSOP II?

The W9412G6KH-4 TR combines DDR SDRAM architecture, an SSTL_2 interface and a compact 66-TSSOP package to deliver a 128 Mbit volatile memory option with clearly specified timing, voltage and temperature parameters. Its organization and electrical specifications make it appropriate for systems that require a defined SSTL_2 DDR memory element within the stated operating limits.

Choose this device when your design requires a space-efficient 128 Mbit DRAM with 8M × 16 organization, 250 MHz clock capability, and operation over 2.4 V–2.7 V and 0°C–70°C environments.

If you need pricing or availability, request a quote or submit an RFQ to receive detailed information and lead-time estimates for the W9412G6KH-4 TR.

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