SVCFSC Series – 20.7MM X 13.1MM Metal Full Size Dip CMOS VCXO

3D Product View

3D View

Features

• ±20ppm (Frequency Stability) Available
• Standard Full-Size Package
• CMOS/TTL Compatible
• Fundamental or PLL (Phase Lock Loop)

Applications

• Phase Locked Loops Circuit
• Synthesizers
• Base Stations

3D Product View

3D View

Features

• ±20ppm (Frequency Stability) Available
• Standard Full-Size Package
• CMOS/TTL Compatible
• Fundamental or PLL (Phase Lock Loop)

Applications

• Phase Locked Loops Circuit
• Synthesizers
• Base Stations

Part Number Builder

Please choose your parameters to build a part number:

Part Numbering Guide

svcfsc part numbering guide

Electrical Parameters

ParametersUnitsMinTypicalMaxRemarks
Frequency RangeMHz1160
Frequency Stability (Includes Initial
Tolerance at 25°C, Frequency Stability
over Operating Temperature, Output Load
Change, Supply Voltage Change, and First
Year Aging at 25°C.)
ppm-20+20See part numbering guide for options.
Operating Temperature°C-40+85See part numbering guide for options.
Storage Temperature°C-55+125
Supply Voltage (VDD) - 3.3V OptionV3.1353.33.465Available with AT-Cut Fundamental and PLL.
Supply Voltage (VDD) - 5.0V OptionV4.7505.05.250Only available with AT-Cut Fundamental.
Current (IDD) - 3.3V OptionmA40
Current (IDD) - 5.0V OptionmA50
Current Voltage (VC) 3.3V OptionV0.33.0
Current Voltage (VC) 5.0V OptionV0.54.5
Pullabilityppm±50±100±150See part numbering guide for options.
Linearity%10
Output Load (CMOS)pF15
Output Load (TTL)TTL10
CMOS Output Logic Levels High (VOH) V0.9*VDD
CMOS Output Logic Levels Low (VOL) V0.1*VDD
TTL Output Logic Levels High (VOH) V2.4
TTL Output Logic Levels Low (VOL) V20.4
Rise (TR) and Fall (TF) Timens5
Symmetry (Duty Cycle)%455055
Start-Up Timems10
Phase Jitter (12kHz ~ 20MHz)ps1AT-Cut Fundamental
Phase Jitter (12kHz ~ 20MHz)ps5PLL (Phase Lock Loop)

Outline Drawing & Recommended Landed Pattern

All dimensions are in millimeters (mm) unless otherwise noted. Drawings are not to scale.

SVCFSC 2d
SVCFSC Table
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