AX250-CQ352M
| Part Description |
Axcelerator Field Programmable Gate Array (FPGA) IC 198 55296 352-BFCQFP with Tie Bar |
|---|---|
| Quantity | 77 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 44 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 352-CQFP (75x75) | Grade | Military | Operating Temperature | -55°C – 125°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 352-BFCQFP with Tie Bar | Number of I/O | 198 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 4224 | Number of Logic Elements/Cells | 4224 | ||
| Number of Gates | 250000 | ECCN | 3A001A2C | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 55296 |
Overview of AX250-CQ352M – Axcelerator FPGA IC, 198 I/Os, 352-BFCQFP
The AX250-CQ352M is a Microchip Axcelerator field programmable gate array (FPGA) built on the AX architecture and antifuse CMOS process. It provides a single-chip, nonvolatile programmable solution with deterministic timing and system-level capabilities suited to military-grade applications that require wide operating temperature and secure programming.
Designed for high-performance embedded logic and I/O integration, this device combines 250,000 equivalent system gates, approximately 55 kbits of embedded memory, segmentable clocking and PLL resources, and flexible multi-standard I/Os to address high-speed processing and secure control designs.
Key Features
- Core & Architecture
AX architecture implemented with antifuse programming for a single-chip, nonvolatile FPGA solution and FuseLock™ programming technology to protect design intellectual property. - Logic Capacity
250,000 equivalent system gates and 4,224 logic elements to map mid-range FPGA designs. - Embedded Memory & FIFO
Approximately 55 kbits (55,296 bits) of on-chip RAM with embedded FIFO control logic and variable-aspect RAM block support for configurable width and depth. - I/O Flexibility
198 user I/Os with support for high-speed interfaces including LVDS (700 Mb/s capable) and bank-selectable, mixed-voltage operation as described in the Axcelerator family feature set. - Performance & Timing
Family-level performance characteristics include system performance in the 350+ MHz range and internal performance above 500 MHz; devices include segmentable clocks and embedded PLLs (14–200 MHz input range, frequency synthesis to 1 GHz). - Power & Voltage
Core voltage supply specified from 1.425 V to 1.575 V for optimized low-voltage operation. - Package & Mounting
352-BFCQFP with tie bar (supplier package: 352-CQFP, 75 × 75 mm footprint), surface-mount package suitable for board-level assembly. - Temperature & Grade
Military grade operation with an operating temperature range of −55 °C to 125 °C. - Diagnostics & Test
In-system diagnostic capability with Microchip Silicon Explorer II and IEEE 1149.1 boundary-scan testing for production and field diagnostics. - Standards & Compliance
RoHS compliant.
Typical Applications
- Defense & Military Systems
Secure, nonvolatile FPGA logic and wide temperature range make this device suited to ruggedized and mission-critical electronics. - High-Speed Data Acquisition
Embedded FIFOs, high internal performance and LVDS-capable I/Os enable reliable capture and buffering of high-rate serial data. - Communications & Interface Bridging
Flexible multi-standard I/O support and programmable drive/slew options simplify interface conversion and protocol bridging tasks. - Secure Embedded Processing
Antifuse technology and FuseLock programming protect designs that require resilience against reverse engineering and IP theft.
Unique Advantages
- Nonvolatile, single-chip solution: Reduces system boot complexity and removes the need for external configuration memory.
- Deterministic timing and high internal performance: Segmentable clocks and embedded PLLs enable reliable timing control for demanding processing and data-path designs.
- Flexible I/O standards: Bank-selectable, mixed-voltage I/Os and high-speed LVDS capability reduce external level-shifting and interface components.
- Designed for harsh environments: Military temperature rating (−55 °C to 125 °C) supports deployment in extreme conditions.
- Integrated diagnostics and testability: In-system diagnostics and IEEE 1149.1 boundary-scan support ease manufacturing test and field troubleshooting.
Why Choose AX250-CQ352M?
The AX250-CQ352M positions itself as a mid-capacity, secure FPGA option that delivers a balance of logic resources, embedded memory, and high-speed I/O flexibility in a military-grade package. Its antifuse-based nonvolatile architecture and FuseLock protection provide design security while built-in PLLs, segmentable clocks and embedded FIFOs address performance and system integration needs.
This device is well suited for engineers designing secure, high-performance embedded systems that require deterministic timing, field diagnostics and operation across a wide temperature range.
Request a quote or submit a pricing inquiry to receive lead-time and volume-pricing information for the AX250-CQ352M.

Date Founded: 1989
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