EP20K600EFC672-1X
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 508 311296 24320 672-BBGA |
|---|---|
| Quantity | 304 Available (as of October 9, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 508 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2432 | Number of Logic Elements/Cells | 24320 | ||
| Number of Gates | 1537000 | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 311296 |
Overview of EP20K600EFC672-1X – APEX-20KE® Field Programmable Gate Array (FPGA)
The EP20K600EFC672-1X is a commercial-grade APEX-20KE family FPGA offering high logical density and on-chip embedded memory in a 672-BBGA surface-mount package. It implements the family’s MultiCore architecture combining LUT-based logic, product-term logic and embedded system blocks (ESBs) to support memory-intensive and register-heavy functions.
Targeted at applications that require large logic capacity, abundant I/O and flexible clocking, this device delivers 24,320 logic elements, approximately 1.537 million gates, about 0.31 Mbits of embedded memory, and 508 I/O pins while operating from a 1.71 V–1.89 V supply over a 0 °C to 85 °C commercial temperature range.
Key Features
- Core Architecture MultiCore architecture integrating LUT logic, product-term logic and embedded system blocks (ESBs) for mixed register- and combinatorial-intensive functions.
- Logic Capacity 24,320 logic elements and approximately 1,537,000 system gates provide substantial resources for complex glue logic, state machines and custom processing blocks.
- Embedded Memory Approximately 0.31 Mbits (311,296 bits) of on-chip RAM in ESBs suitable for FIFOs, dual-port RAM and content-addressable memory implementations.
- I/O and Interface 508 user I/O pins with MultiVolt I/O interface support (family-level support for 1.8 V, 2.5 V, 3.3 V and 5.0 V levels) to interface with a wide range of external devices and memory.
- Clock Management Family-level clock features include up to four PLLs, a built-in low-skew clock tree, up to eight global clock signals and programmable clock-shift/multiplication features for flexible timing architectures.
- Power and Supply Internal supply operating range of 1.71 V to 1.89 V (VCCINT) with low-power design considerations provided by the APEX 20K family.
- Package & Mounting 672-BBGA (supplier device package: 672-FBGA, 27×27 mm) in a surface-mount form factor suited for compact board layouts.
- Commercial Grade & Compliance Commercial operating temperature range of 0 °C to 85 °C and RoHS compliance for regulatory adherence in commercial applications.
Typical Applications
- Embedded System Integration Implement SOPC-style system integration where on-chip logic and ESBs reduce external component count for compact embedded controllers.
- Memory Interface and Buffering Use the ESB RAM and abundant I/O to build FIFOs, dual-port memories and interfaces to external DDR or ZBT memory devices.
- High-Speed I/O and Bus Interfaces Leverage the MultiVolt I/O compatibility and broad I/O count for PCI-family interfaces, custom bus bridging and high-pin-count peripheral control.
- Control and Glue Logic Deploy in complex board-level control, protocol translation and combinatorial logic tasks that require dense logic and predictable clocking.
Unique Advantages
- High Logic and Memory Density: 24,320 logic elements combined with approximately 0.31 Mbits of embedded RAM enable large, integrated designs without external logic or memory proliferation.
- Flexible Clocking: Multiple PLLs, global clock signals and programmable clock features simplify timing architectures for multi-domain designs.
- Extensive I/O Capability: 508 user I/Os and MultiVolt I/O support provide versatility for mixed-voltage interfaces and a wide range of external peripherals.
- Compact, Surface-Mount Package: 672-BBGA (27×27 mm) packaging supports high-density PCB layouts while keeping a large I/O count available.
- Commercial-Grade Compliance: Rated for 0 °C to 85 °C operation and RoHS compliant for mainstream commercial applications and supply-chain compatibility.
Why Choose EP20K600EFC672-1X?
The EP20K600EFC672-1X balances substantial logic resources, embedded memory and flexible I/O in a commercially rated, RoHS-compliant FPGA package. Its family-provided MultiCore architecture and clock-management features make it well suited to designs that require on-chip memory structures, high I/O counts and deterministic clocking.
This device is appropriate for designers building complex commercial embedded systems, memory interfaces, bus bridges and dense control logic who need a single-chip solution that reduces external components while delivering verified family-level capabilities.
Request a quote or submit your design requirements to receive pricing and availability for EP20K600EFC672-1X. Our team can provide lead-time information and assist with procurement details.

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