EP20K600EFC672-2
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 508 311296 24320 672-BBGA |
|---|---|
| Quantity | 911 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 508 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2432 | Number of Logic Elements/Cells | 24320 | ||
| Number of Gates | 1537000 | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 311296 |
Overview of EP20K600EFC672-2 – APEX-20KE FPGA (672-BBGA)
The EP20K600EFC672-2 is an APEX-20KE family field programmable gate array (FPGA) in a 672-ball BGA package. It combines a MultiCore architecture with embedded system blocks (ESBs) and lookup-table (LUT) logic to support register-intensive and memory-intensive functions.
With 24,320 logic elements, approximately 0.31 Mbits of embedded memory and 508 I/O, this commercial-grade, surface-mount device targets high-density logic, complex system integration, and high-I/O applications where on-chip memory and flexible I/O are required.
Key Features
- Core & Architecture — MultiCore architecture integrating LUT logic and product-term logic for flexible implementation of both register- and combinatorial-intensive functions.
- Logic Capacity — 24,320 logic elements and 1,537,000 system gates to support large, complex designs.
- Embedded Memory — Approximately 0.31 Mbits of on-chip RAM provided via ESBs for FIFOs, dual-port RAM and CAM-style implementations.
- I/O & Interfaces — 508 user I/O pins; datasheet family features include MultiVolt I/O support and high-speed I/O standards such as LVDS and PCI-level signaling support for diverse interfacing needs.
- Clock & Timing — Integrated clock-management features in the APEX 20K family including multiple PLLs, a low-skew clock tree and programmable clock phase/delay controls for precise timing management.
- Power & Supply — Internal supply range of 1.71 V to 1.89 V with APEX 20K family support for MultiVolt I/O interfaces (1.8 V, 2.5 V, 3.3 V, and 5.0 V levels noted in the family datasheet).
- Package & Mounting — 672-BBGA package (supplier package 672-FBGA, 27 × 27) optimized for surface-mount assembly.
- Commercial Grade & Temperature Range — Commercial-grade device rated for 0 °C to 85 °C operating temperature; RoHS compliant.
Typical Applications
- High-performance memory interfaces — Implement DDR SDRAM and ZBT SRAM controllers and buffering using the device’s ESBs and high I/O count.
- PCI and bus bridging — Support for PCI bus signaling and high-pin-count I/O makes the device suitable for bus-interface and bridging functions.
- High-density logic integration — Ideal for complex control, protocol handling or datapath logic that require tens of thousands of logic elements and abundant on-chip memory.
- High-speed serial/parallel I/O — Use LVDS-capable I/O and programmable I/O standards for high-throughput link or multi‑lane interfacing.
Unique Advantages
- High logic density: 24,320 logic elements and over 1.5 million system gates enable large-scale, integrated designs within a single FPGA.
- Embedded memory for system functions: ESBs provide approximately 0.31 Mbits of embedded RAM for FIFOs, dual-port RAM and CAM-like implementations, reducing external memory requirements.
- Flexible I/O voltage support: APEX 20K family MultiVolt I/O capabilities allow interfacing with multiple logic voltage domains without large external translation circuits.
- Comprehensive clock management: Multiple PLLs and low-skew clock distribution enable precise timing control for synchronous designs and high-speed interfaces.
- Compact, high-pin-count package: 672-ball BGA (27 × 27) delivers a high I/O count (508 pins) in a space-efficient surface-mount form factor.
- Commercial readiness: Commercial-grade temperature rating (0 °C to 85 °C) and RoHS compliance simplify deployment in standard electronics environments.
Why Choose EP20K600EFC672-2?
The EP20K600EFC672-2 positions itself as a high-capacity, system-oriented FPGA within the APEX 20K family—combining substantial logic resources, embedded RAM, and flexible I/O in a single 672-BBGA device. It is suited for engineers designing complex digital systems who need on-chip memory, high I/O counts and sophisticated clocking features.
For projects that require consolidation of logic and memory functions, reliable commercial-grade operation, and adherence to RoHS requirements, this APEX-20KE device offers a balanced mix of integration and predictable electrical characteristics across its specified supply and temperature ranges.
Request a quote or submit a pricing inquiry to initiate procurement or to receive detailed availability information for the EP20K600EFC672-2.

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