EP2AGX45CU17C6G

IC FPGA 156 I/O 358UBGA
Part Description

Arria II GX Field Programmable Gate Array (FPGA) IC 156 3517440 42959 358-LFBGA, FCBGA

Quantity 942 Available (as of October 8, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusActive
Manufacturer Standard Lead Time26 Weeks
Datasheet

Specifications & Environmental

Device Package358-UBGA, FCBGA (17x17)GradeCommercialOperating Temperature0°C – 85°C
Package / Case358-LFBGA, FCBGANumber of I/O156Voltage870 mV - 930 mV
Mounting MethodSurface MountRoHS ComplianceRoHS CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs1805Number of Logic Elements/Cells42959
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits3517440

Overview of EP2AGX45CU17C6G – Arria II GX FPGA, 42,959 Logic Elements, approximately 3.52 Mbits RAM, 156 I/O, 358-LFBGA

The EP2AGX45CU17C6G is an Intel Arria II GX series Field Programmable Gate Array offered in a 358-LFBGA surface-mount package. It provides a 40‑nm, low‑power programmable logic engine suited for designs that require substantial logic capacity, on‑chip memory, and a moderate I/O count.

Targeted at commercial-grade applications, this device addresses use cases that need integrated programmable logic with efficient memory and DSP resources, and benefits from the Arria II family architecture for high-bandwidth system interfaces and common serial/parallel protocol support.

Key Features

  • Logic Capacity — 42,959 logic elements (cells) to implement complex programmable logic and custom control functions.
  • Embedded Memory — Approximately 3.52 Mbits of total on‑chip RAM (3,517,440 bits) for FIFOs, buffers, and data storage close to logic.
  • I/O and Package — 156 user I/O pins in a 358-LFBGA (358-UBGA, 17×17) FCBGA package; surface-mount mounting for PCB assembly.
  • Voltage and Temperature — Core supply range from 870 mV to 930 mV and commercial operating temperature of 0 °C to 85 °C.
  • Arria II Family Capabilities — Series features include a 40‑nm low‑power FPGA engine, Adaptive Logic Module (ALM) architecture, eight‑input fracturable LUTs, MLABs for efficient small FIFOs, and DSP blocks (series-level details from the Arria II handbook).
  • High‑Speed Serial and Protocol Support — The Arria II family provides infrastructure for high‑bandwidth serial protocols (series-level), enabling implementations of PCIe, Ethernet, DDR3 interfaces and other serial PHY solutions where applicable.
  • Design and Security Support — Series-level design flow and IP ecosystem (Quartus II, DSP Builder, and available hard/soft IP) and AES programming file encryption options are part of the Arria II device family capabilities.
  • Environmental Compliance — RoHS compliant for regulatory alignment in commercial electronic assemblies.

Typical Applications

  • Network and Communications Equipment — Implement protocol bridging, packet processing, or interface adaptation where Arria II family serial and PHY capabilities are required.
  • High‑Bandwidth Interfaces — Support for systems requiring DDR3 memory controllers and PCIe or Ethernet physical interfaces when leveraging Arria II family IP.
  • Signal Processing and DSP Functions — Use the device’s embedded RAM and DSP resources for filtering, aggregation, and intermediate buffering in real‑time data paths.
  • Custom Logic and Control — Replace or augment ASICs and CPLDs with flexible programmable logic for control, protocol translation, or system glue logic in commercial products.

Unique Advantages

  • Substantial Logic Resource: 42,959 logic elements enable implementation of sizable custom logic blocks and state machines without external components.
  • On‑Chip Memory: Approximately 3.52 Mbits of embedded RAM reduces dependence on external memory for buffering and small FIFO needs.
  • Commercial‑Grade Integration: Surface‑mount 358‑LFBGA package and a defined 0 °C–85 °C operating range simplify selection for commercial product designs.
  • Arria II Ecosystem: Access to family-level IP and design flows (Quartus II, DSP Builder) streamlines development and integration of common interfaces like PCIe, Ethernet, and DDR3.
  • Power and Supply Clarity: Documented core supply range (870 mV–930 mV) supports precise power budgeting and regulator selection during hardware design.
  • Regulatory Compliance: RoHS status ensures alignment with standard environmental requirements for electronic assemblies.

Why Choose EP2AGX45CU17C6G?

The EP2AGX45CU17C6G places substantial programmable logic, embedded memory, and a moderate I/O complement into a compact 358‑LFBGA footprint for commercial applications. It leverages the Arria II family architecture—designed for low power and efficient DSP and memory implementations—making it suitable for designs that require flexible, on‑board processing and high‑bandwidth interface options supported by family‑level IP.

This device is aimed at engineering teams building commercial electronic systems that benefit from a mature FPGA ecosystem, deterministic electrical requirements (supply voltage and operating temperature), and RoHS compliance to streamline product development and manufacturing.

Request a quote or submit an inquiry to obtain pricing, availability, and ordering information for EP2AGX45CU17C6G.

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