EPF10K30AQC240-3
| Part Description |
FLEX-10KA® Field Programmable Gate Array (FPGA) IC 189 12288 1728 240-BFQFP |
|---|---|
| Quantity | 1,278 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 240-PQFP (32x32) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 240-BFQFP | Number of I/O | 189 | Voltage | 3 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 216 | Number of Logic Elements/Cells | 1728 | ||
| Number of Gates | 69000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 12288 |
Overview of EPF10K30AQC240-3 – FLEX-10KA® Field Programmable Gate Array (FPGA) IC 189 I/O, 12,288 RAM bits, 1,728 LEs, 240-BFQFP
The EPF10K30AQC240-3 is a FLEX-10KA family field programmable gate array (FPGA) offered by Intel. It combines a logic array with embedded memory to enable system-on-a-programmable-chip integration for embedded and mixed-signal control, interface, and mezzanine logic designs.
With 1,728 logic elements, 12,288 bits of embedded RAM, and 189 user I/O pins in a 240-pin BFQFP surface-mount package, this commercial-grade device targets applications that require medium-density programmable logic, flexible I/O and on-chip memory within a standard commercial temperature range.
Key Features
- Logic Capacity — 1,728 logic elements (LEs) and 216 logic array blocks (LABs) provide medium-density programmable logic resources for combinational and sequential designs.
- Gate Count — 69,000 gates available for implementing integrated logic and glue functions.
- Embedded Memory — 12,288 total RAM bits of on-chip memory to support megafunctions and local data storage without external memory.
- I/O — 189 user I/O pins to support multiple interfaces, board-level peripherals and high pin-count connectivity.
- Power and Supply — Operates from a 3.0 V to 3.6 V supply range, suitable for 3.3 V system designs.
- Package & Mounting — 240-BFQFP package (supplier device package: 240-PQFP, 32×32 footprint) for surface-mount applications.
- Operating Temperature & Grade — Commercial grade with an operating temperature range of 0 °C to 70 °C; RoHS compliant.
- In-System Reconfigurability & Test — Supports in-circuit reconfigurability (ICR) and includes built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990.
- High-Level Family Features — FLEX 10K family capabilities such as dedicated carry and cascade chains, low-skew clock distribution, FastTrack® interconnect routing, and options for clock delay/skew management (ClockLock™ / ClockBoost™) are available within the family architecture.
- I/O Control Options — Per-pin features such as individual tri-state enable, open-drain option, and programmable output slew-rate control are supported by the FLEX 10K family architecture.
- PCI Support (Family) — FLEX 10K and FLEX 10KA family devices include system-level features for PCI compatibility as documented in the family datasheet.
Typical Applications
- System Integration / SOPC — Use as a programmable logic substrate for integrating glue logic, protocol adapters and small megafunctions directly on board, leveraging embedded RAM and programmable logic.
- Interface and I/O Expansion — Implement custom interface logic, level translation control and peripheral aggregation using 189 user I/O pins and per-pin I/O control features.
- In-Circuit Reconfigurable Prototypes — Ideal for development platforms and prototypes that benefit from in-circuit reconfiguration and JTAG boundary-scan for debug and device programming.
- Local Data Buffering — On-chip RAM (12,288 bits) supports small buffers, FIFOs or lookup tables for data-path and control applications without immediate external memory.
Unique Advantages
- Balanced Density — A combination of 1,728 logic elements and 69,000 gates provides a practical mid-range capacity for glue logic and integrated control functions without overdesign.
- Generous I/O — 189 user I/O pins enable high fan-out connectivity for multi-peripheral or multi-channel designs, reducing the need for external I/O expanders.
- Embedded RAM for Megafunctions — 12,288 bits of on-chip memory permit implementation of local storage, small FIFOs or table-based logic directly inside the FPGA fabric.
- Industry-Standard Package — 240-pin BFQFP (surface mount) and standard 32×32 PQFP footprint simplify board-level integration into existing designs.
- Testability and Reconfiguration — Built-in IEEE 1149.1-compliant JTAG boundary-scan and support for in-circuit reconfigurability streamline manufacturing test and field updates.
- RoHS Compliant — Meets regulatory requirements for lead-free assembly in commercial electronics.
Why Choose EPF10K30AQC240-3?
The EPF10K30AQC240-3 offers a practical mid-density FLEX-10KA FPGA solution for designers who need a balance of logic, embedded memory and extensive I/O in a commercial-grade, surface-mount package. Its integrated features—on-chip RAM, sizable I/O count, JTAG test capability and family-level architecture aids such as dedicated carry/cascade chains—make it suitable for board-level integration where flexibility and reconfigurability matter.
This device is well suited to customers building embedded systems, prototyping platforms and interface logic modules who require reliable, RoHS-compliant programmable logic with a 3.0–3.6 V supply and standard commercial temperature operation.
Request a quote or submit a procurement request to start the purchasing process for EPF10K30AQC240-3.

Date Founded: 1968
Headquarters: Santa Clara, California, USA
Employees: 130,000+
Revenue: $54.23 Billion
Certifications and Memberships: ISO9001:2015, ISO14001:2015, ISO17025:2017, ISO27001:2022, ISO45001:2018, ISO50001:2018