LCMXO2-7000HE-5BG332C

IC FPGA 278 I/O 332CABGA
Part Description

MachXO2 Field Programmable Gate Array (FPGA) IC 278 245760 6864 332-FBGA

Quantity 1,670 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusActive
Manufacturer Standard Lead Time20 Weeks
Datasheet

Specifications & Environmental

Device Package332-CABGA (17x17)GradeCommercialOperating Temperature0°C – 85°C
Package / Case332-FBGANumber of I/O278Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs858Number of Logic Elements/Cells6864
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits245760

Overview of LCMXO2-7000HE-5BG332C – MachXO2 Field Programmable Gate Array (FPGA) IC 278 245760 6864 332-FBGA

The LCMXO2-7000HE-5BG332C is a MachXO2 family Field Programmable Gate Array (FPGA) designed for commercial applications that require instant-on non-volatile logic, flexible I/O and low standby power. Its flexible logic architecture and on-chip memory make it suitable for control, interface and glue-logic functions across a range of consumer and commercial systems.

Built on the MachXO2 architecture, this device combines 6864 logic elements, embedded block RAM and user-configurable flash with a high-density 332-ball caBGA package for designs that demand integration, reconfigurability and multi-standard I/O support.

Key Features

  • Core Logic  6864 logic elements provide fabric capacity for glue logic, control functions and moderate combinational/sequential designs.
  • Embedded Memory  Approximately 240 kbits of embedded block RAM (245,760 bits total) plus distributed RAM resources for FIFOs and buffering.
  • On-Chip Non-Volatile Storage  User Flash Memory (UFM) up to 256 kbits with 100,000 write cycles for configuration storage and in-field reprogramming.
  • Low Power Architecture  Advanced 65 nm low-power process with standby modes; datasheet lists standby power as low as 22 μW and multiple power-saving options.
  • Flexible I/O  278 I/O pins in the 332-ball package with programmable sysIO buffer supporting LVCMOS (3.3/2.5/1.8/1.5/1.2), LVTTL, PCI, LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL, SSTL and HSTL signaling and on-chip differential termination.
  • Source-Synchronous and DDR Support  Pre-engineered source-synchronous I/O with DDR registers in I/O cells, gearing for display I/Os and dedicated DDR/DDR2/LPDDR memory support.
  • Clocking and PLLs  Multiple primary clocks, up to two edge clocks for high-speed I/O, and up to two analog PLLs with fractional-N synthesis (wide input range).
  • Reconfiguration and System Functions  Instant-on, TransFR in-field logic update capability, SPI/I2C/JTAG programming interfaces, on-chip oscillator and hardened peripherals (SPI, I2C, timer/counter).
  • Package and Supply  332-FBGA / 332-CABGA (17 × 17 mm) package; single supply operation with specified voltage range of 1.14 V to 1.26 V and commercial temperature grade.
  • Operating Range and Compliance  Commercial grade operating temperature 0 °C to 85 °C; RoHS compliant.

Typical Applications

  • Consumer and Commercial Interfaces  Control of user interfaces, display drivers and peripheral bridging where instant-on and flexible I/O standards simplify system design.
  • Embedded Control and Glue Logic  Integration of state machines, protocol bridging and timing-critical control functions that benefit from on-chip flash and reconfigurable logic.
  • Display and Video Subsystems  Source-synchronous I/O, DDR gearing and dedicated I/O features make the device suitable for display timing, buffering and interface adaptation.
  • Communications and Peripherals  Hardened SPI/I2C and programmable high-performance I/O enable protocol conversion, peripheral management and board-level interfacing.

Unique Advantages

  • Non-Volatile Instant-On:  On-chip user flash provides single-chip configuration storage for immediate startup without external configuration memory.
  • Low Standby Power:  Advanced low-power process and standby modes reduce system idle power, supporting energy-conscious designs.
  • Extensive I/O Flexibility:  Wide range of supported I/O standards and on-chip differential termination reduce external components and simplify PCB design.
  • On-Chip Memory Resources:  Embedded block RAM and distributed RAM support buffering and FIFO control without adding external SRAM.
  • In-Field Reconfigurability:  TransFR and background programming enable logic updates while preserving system operation and reduce firmware distribution complexity.
  • Compact, High-Density Packaging:  332-ball caBGA (17 × 17 mm) package offers high I/O count in a compact footprint for space-constrained boards.

Why Choose LCMXO2-7000HE-5BG332C?

The LCMXO2-7000HE-5BG332C delivers a balanced combination of logic capacity, embedded memory and broad I/O support in a compact 332-ball package. Its non-volatile user flash, low standby power and reconfiguration capabilities make it well suited for commercial designs that require reliable instant-on behavior, flexible interfacing and in-field updates.

This device is targeted at designers who need a scalable, integrated solution for control, interface and display tasks where reduced BOM, flexible I/O standards and on-chip memory improve time-to-market and system integration. Density migration within the MachXO2 family supports design scalability over product lifecycles.

Request a quote or contact sales to discuss pricing, availability and integration support for the LCMXO2-7000HE-5BG332C.

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