LCMXO640C-3B256C
| Part Description |
MachXO Field Programmable Gate Array (FPGA) IC 159 640 256-LFBGA, CSPBGA |
|---|---|
| Quantity | 1,132 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 256-CABGA (14x14) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 256-LFBGA, CSPBGA | Number of I/O | 159 | Voltage | 1.71 V - 3.465 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 80 | Number of Logic Elements/Cells | 640 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of LCMXO640C-3B256C – MachXO Field Programmable Gate Array (FPGA), 640 logic elements, 159 I/Os, 256-ball caBGA
The LCMXO640C-3B256C is a MachXO family FPGA optimized for glue logic, bus bridging, power-up control and general control logic. The device combines non-volatile, instant-on architecture with a compact package and high I/O count to address board-level control and interfacing tasks in commercial applications.
Key attributes include 640 logic elements, up to 159 I/Os in a 256-ball package, flexible I/O support and on-chip configurability—providing a single-chip, reconfigurable solution for system integration and in-field updates.
Key Features
- Core Logic Approximately 640 logic elements for implementing glue logic, state machines and bus adapters.
- Memory Distributed RAM support per MachXO family specifications (family-level distributed RAM of up to 6.1 Kbits is supported for the LCMXO640 device).
- I/O and Package 159 I/Os in a 256-ball package (256-LFBGA / 256-CABGA, 14×14 mm supplier package). Multiple package options and high I/O-to-logic density simplify board routing for dense interfaces.
- Non-Volatile, Instant-On Configuration Single-chip, non-volatile configuration enables microsecond power-up and eliminates the need for external configuration memory; supports background programming and JTAG-based non-volatile programming.
- In-Field Reconfiguration TransFR™ reconfiguration and SRAM reconfiguration options allow logic updates while the system operates (family-level feature).
- Flexible I/O Standards Family-level sysIO buffer support for a wide range of interfaces including multiple LVCMOS levels, LVTTL, PCI, LVDS and other differential standards.
- Power and Voltage Device supply range 1.71 V to 3.465 V, enabling compatibility with a variety of system power rails.
- Low-Power Modes Sleep mode capability available (family-level), allowing significant static current reduction during idle periods.
- Operating Range & Compliance Commercial grade operation from 0 °C to 85 °C and RoHS-compliant packaging.
- System Support Family-level support for IEEE 1149.1 boundary scan and IEEE 1532 in-system programming; JTAG programmability is supported.
Typical Applications
- Glue Logic and Board Control Implement address decoding, bus arbitration, reset and power sequencing with instant-on non-volatile logic.
- Bus Bridging and Interfacing High I/O density and flexible I/O standards support bridging between diverse bus voltages and signaling standards.
- Power-Up and System Sequencing Use the device’s single-chip configuration and sleep modes to manage power-up sequences and reduce standby current.
- Control and State Machines Ideal for implementing control logic, protocol handling and system supervision functions in compact commercial designs.
Unique Advantages
- Instant-on Non-Volatile Logic: Single-chip non-volatile configuration provides immediate functionality at power-up without external memory.
- High I/O-to-Logic Density: 159 I/Os paired with 640 logic elements enable complex interfacing in a compact package footprint.
- In-Field Reconfigurability: TransFR reconfiguration and background programming allow updates to logic while systems are operational, simplifying field upgrades.
- Flexible I/O Standards: Programmable I/O buffers support multiple signaling standards to reduce the need for level shifters and glue components.
- Compact, RoHS-Compliant Packaging: 256-ball caBGA / LFBGA packaging provides a small footprint with commercial-grade environmental compliance.
Why Choose LCMXO640C-3B256C?
The LCMXO640C-3B256C is positioned as a compact, reconfigurable solution for commercial applications that need reliable board-level control, interface bridging and instant-on operation. With 640 logic elements, 159 I/Os in a 256-ball package, and MachXO family capabilities such as non-volatile configuration and in-field reprogramming, it simplifies BOM and design complexity for space-constrained systems.
This device suits designers seeking a single-chip, reprogrammable control element with flexible I/O and established family-level system features. Its commercial operating range and RoHS-compliant packaging make it appropriate for a wide range of commercial embedded designs.
Request a quote or submit an inquiry to receive pricing and availability information for the LCMXO640C-3B256C.

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