LFE3-95EA-6LFN672C
| Part Description |
ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA |
|---|---|
| Quantity | 273 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 20 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FPBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 380 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 11500 | Number of Logic Elements/Cells | 92000 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4526080 |
Overview of LFE3-95EA-6LFN672C – ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA
The LFE3-95EA-6LFN672C is a Lattice Semiconductor ECP3-family FPGA in a 672-ball BGA package optimized for high-density, cost-sensitive designs. It integrates a large FPGA fabric with abundant I/O and on-chip memory, making it suitable for high-volume, high-speed, low-cost applications that require signal processing, protocol bridging, or complex glue logic.
Built on the LatticeECP3 architecture, this device pairs enhanced DSP capabilities and source-synchronous I/O support with embedded SERDES and flexible configuration options to help engineers consolidate system functions while maintaining power- and area-efficient designs.
Key Features
- Logic Capacity 92,000 logic elements (cells) to implement complex digital functions and system-level integration.
- On-chip Memory Approximately 4.53 Mbits of embedded memory (4,526,080 total RAM bits) for frame buffers, FIFOs, and intermediate processing storage.
- High I/O Count 380 user I/Os to support wide parallel interfaces, multiple peripherals, and board-level connectivity.
- Embedded SERDES and High-Speed Interfaces Family-level support includes SERDES channels with data rates from 150 Mbps to 3.2 Gbps and common protocols such as PCI Express, SONET/SDH, Ethernet, CPRI, SMPTE 3G, and Serial RapidIO.
- Enhanced DSP (sysDSP) Family architecture provides cascadable DSP slices for high-performance multiply–accumulate operations and advanced ALU support for signal-processing tasks.
- Flexible I/O Standards (sysI/O) Programmable I/O buffers support a broad range of standards (LVTTL, LVCMOS, SSTL, HSTL, LVDS, Bus-LVDS, LVPECL, RSDS, MLVDS) with on-chip termination and optional input equalization.
- Clocking and Timing Up to ten PLLs and two DLLs per device (family-level detail) to manage clock domains and support source-synchronous interfaces and memory timing requirements.
- Package & Mount 672-BBGA (supplier package: 672-FPBGA, 27 × 27 mm) surface-mount package suitable for compact, high-density board layouts.
- Power & Temperature Core supply range 1.14 V to 1.26 V; commercial operating temperature 0 °C to 85 °C.
- Regulatory RoHS compliant for lead‑free manufacturing processes.
Typical Applications
- High‑Speed Communications Protocol bridging and line cards leveraging embedded SERDES and multi‑protocol support such as Ethernet, PCIe, and SONET/SDH.
- Video and Broadcast Processing SMPTE 3G and high-bandwidth serial interfaces for video transport and preprocessing using embedded DSP resources and on-chip memory.
- Industrial and Consumer Connectivity Multi-I/O interfacing, sensor aggregation, and protocol adaptation where high I/O count and flexible I/O standards are required.
- Signal Processing and Acceleration Real‑time data path implementations using sysDSP slices and embedded memory for filtering, accumulation, and packet buffering.
Unique Advantages
- High Logic Density: 92,000 logic elements allow consolidation of multiple functions into a single device, reducing BOM and board area.
- Substantial Embedded Memory: Approximately 4.53 Mbits of on-chip RAM supports frame buffers, FIFOs, and local data storage without external RAM in many use cases.
- Large I/O Count with High-Speed Links: 380 I/Os combined with family SERDES support enable broad connectivity and multi-protocol interfacing on one device.
- Flexible I/O Standards: Programmable sysI/O buffers and on-chip termination simplify mixed-signal board designs and accelerate interface integration.
- Compact, Surface‑Mount Package: 672-BBGA (27 × 27 mm) offers a balance of I/O density and PCB space efficiency for compact system designs.
- Commercial‑Grade Operating Range: 0 °C to 85 °C rating aligns with mainstream embedded and consumer product requirements.
Why Choose LFE3-95EA-6LFN672C?
The LFE3-95EA-6LFN672C brings the LatticeECP3 family’s combination of DSP-optimized fabric, high-speed serial capabilities, and flexible I/O to designs that need high integration at controlled cost. With 92,000 logic elements, substantial on-chip memory, and 380 user I/Os in a compact 672-ball BGA package, it addresses demanding interface and processing requirements while streamlining system architecture.
This device is well suited to engineers building high-volume communications, video, and embedded processing products who need a reliable, programmable platform with a rich set of family-level features for SERDES, DSP, and flexible I/O standards. The RoHS compliance and surface-mount package further support modern manufacturing needs.
If you would like pricing, availability, or to request a quote for LFE3-95EA-6LFN672C, submit a quote request or inquiry to purchase through your usual procurement channel.