LFE3-95EA-7FN672C
| Part Description |
ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA |
|---|---|
| Quantity | 1,099 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 20 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FPBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 380 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 11500 | Number of Logic Elements/Cells | 92000 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4526080 |
Overview of LFE3-95EA-7FN672C – ECP3 Field Programmable Gate Array (FPGA), 380 I/Os, 672-BBGA
The LFE3-95EA-7FN672C is a commercial-grade FPGA from the LatticeECP3 family, offering a reconfigurable logic fabric optimized for high-performance, cost-sensitive designs. Built for system integration, this device combines a large logic capacity, on-chip memory, high-speed I/O capability and family-level DSP/SERDES resources to address networking, communication and general embedded applications.
This device is supplied in a 672-ball fine-pitch BGA (27 × 27 mm) surface-mount package, supports a 1.14 V to 1.26 V core supply and operates across a 0 °C to 85 °C commercial temperature range.
Key Features
- Logic Capacity — Approximately 92,000 logic elements for implementing complex programmable logic and glue functions.
- Embedded Memory — Approximately 4.53 Mbits of on-chip RAM (4,526,080 bits) to support buffering, state storage and on-chip data structures.
- High I/O Count — 380 user I/Os in the 672-BBGA package to support wide parallel interfaces and multi-channel connectivity.
- Embedded SERDES (family capability) — LatticeECP3 family supports embedded SERDES with data rates from 150 Mbps to 3.2 Gbps; the 672 package maps to the family configuration providing multi-channel SERDES capability alongside the 380 I/Os.
- sysDSP and Multipliers — Family-level DSP architecture with dedicated multiply-accumulate slices; ECP3-95 family devices include 128 18×18 multipliers for signal processing tasks.
- Clocking Resources — Device-level PLLs and DLLs (family data indicates up to 10 PLLs and 2 DLLs for this device class) for flexible clock generation and domain management.
- Flexible I/O Standards — Family supports a wide range of programmable I/O standards and on-chip termination options for interfacing with diverse peripherals and memory types.
- Package & Mounting — 672-ball FPBGA (27 × 27 mm) surface-mount package (supplier device package: 672-FPBGA) for compact board-level integration.
- Power & Temperature — Core voltage range 1.14 V to 1.26 V; commercial operating temperature 0 °C to 85 °C.
- Regulatory — RoHS compliant.
Typical Applications
- High-Speed Networking — Implement line cards, PHY bridging and protocol framing where multi‑lane SERDES and high I/O counts are required.
- Serial Protocol Interfaces — Ideal for systems requiring protocol support such as PCI Express, Ethernet variants, CPRI and other serial links supported by the ECP3 family SERDES.
- Embedded Signal Processing — Leverage sysDSP slices and dedicated multipliers for DSP tasks such as filtering, data aggregation and real‑time processing.
- Memory Interface and Buffering — Use on-chip RAM and source-synchronous I/O features for DDR/DDR2/DDR3 memory interfaces and high-throughput buffering.
Unique Advantages
- High Logic Density: ~92,000 logic elements enable complex system-on-FPGA functions and consolidation of multiple discrete components.
- Integrated Memory Resources: Approximately 4.53 Mbits of embedded RAM reduces the need for external buffering and lowers BOM complexity.
- Broad I/O and SERDES Capability: 380 I/Os and family SERDES support allow flexible connectivity for multi-protocol designs and high-speed links.
- Scalable DSP Performance: Dedicated multipliers and sysDSP architecture provide deterministic arithmetic resources for signal-processing workloads.
- Compact, Surface-Mount Package: 672-ball FPBGA (27×27 mm) balances I/O density and PCB area for space-constrained systems.
- Commercial Grade with RoHS Compliance: Suitable for mainstream embedded and communications products where commercial temperature range and lead‑free compliance are required.
Why Choose LFE3-95EA-7FN672C?
The LFE3-95EA-7FN672C positions itself where system integration and performance meet economical design goals. With substantial logic capacity, multi-megabit on-chip RAM and high I/O density in a compact 672-BBGA package, it suits designs that require on-board processing, multi-channel I/O and high-speed serial links while keeping board-level complexity and part count down.
This device is a fit for engineering teams building high-volume, high-throughput embedded systems, communication endpoints and interface bridges who need proven family-level DSP and SERDES capabilities together with flexible clocking and I/O support.
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