LFEC3E-3TN100I

IC FPGA 67 I/O 100TQFP
Part Description

EC Field Programmable Gate Array (FPGA) IC 67 56320 3100 100-LQFP

Quantity 604 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package100-TQFP (14x14)GradeIndustrialOperating Temperature-40°C – 100°C
Package / Case100-LQFPNumber of I/O67Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceUnknownREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs384Number of Logic Elements/Cells3100
Number of GatesN/AECCNEAR99HTS Code8542.39.0001
QualificationN/ATotal RAM Bits56320

Overview of LFEC3E-3TN100I – EC Field Programmable Gate Array (FPGA) IC 67 56320 3100 100-LQFP

The LFEC3E-3TN100I is an industrial-grade EC family FPGA in a 100-pin LQFP package designed for mainstream, cost-sensitive embedded and industrial applications. It combines a compact footprint and low-voltage operation with on-chip logic, RAM and flexible I/O to support system-level functions and interface bridging.

As part of the LatticeECP/EC family, this device targets designs that require approximately 3,100 logic elements, deterministic I/O counts and system features such as PLLs, boundary-scan and SPI boot support while operating across a wide industrial temperature range.

Key Features

  • Logic Capacity  Approximately 3,100 logic elements and 384 logic blocks provide the combinational and sequential resources for mid-density designs.
  • On-Chip Memory  Total on-chip RAM of 56,320 bits supports moderate buffering, state storage and small embedded memories for control and data-path tasks.
  • I/O and Package  67 user I/Os in a 100-pin LQFP package (supplier reference: 100-TQFP, 14 × 14 mm). Surface-mount packaging helps keep board space and BOM low.
  • Supply and Temperature  Low-voltage core operation at 1.14 V to 1.26 V and industrial operating temperature from −40 °C to 100 °C for reliable deployment in rugged environments.
  • Clocking  Two sysCLOCK™ PLLs (family-level feature for this density) enable clock multiplication, division and phase adjustments for multi-clock designs.
  • Flexible I/O Standards  Family I/O buffer programmability supports a wide range of interfaces (examples in family documentation include LVCMOS, LVTTL, SSTL, HSTL, PCI and LVDS), enabling interfacing with diverse peripherals and memory signaling.
  • System-Level Support  Includes IEEE 1149.1 boundary scan and ispTRACY™ internal logic analyzer capability at the family level, along with SPI boot flash interface support for in-system configuration.
  • RoHS Compliant  Manufactured to meet RoHS requirements.

Typical Applications

  • Industrial control and automation  Industrial temperature rating and compact LQFP packaging suit control logic, I/O aggregation and protocol conversion in factory and process equipment.
  • Embedded communications  Flexible I/O standards and on-chip PLLs enable interfacing and clocking for mid-density communications and bridging functions.
  • Instrumentation and measurement  On-chip RAM and deterministically available logic resources support data capture, preprocessing and interface control in measurement devices.

Unique Advantages

  • Right-sized mid-density logic  Approximately 3,100 logic elements deliver the capacity needed for control, glue logic and moderate datapath functions without excess cost or board area.
  • Compact surface-mount package  100-pin LQFP (supplier 100-TQFP, 14 × 14 mm) keeps PCB footprint small while providing 67 usable I/Os for multiple peripheral connections.
  • Industrial robustness  Rated for −40 °C to 100 °C operation, enabling deployment in industrial and other temperature-challenging environments.
  • Low-voltage core  1.14 V to 1.26 V supply range matches low-voltage system designs and helps reduce overall power draw at the core level.
  • System integration features  Boundary-scan, SPI boot interface and internal logic analysis capabilities streamline development, prototyping and in-field configuration.
  • Family-level ecosystem  Supports Lattice family development tools and IP (ispLEVER and ispLeverCORE modules referenced in family documentation) for faster implementation and density migration.

Why Choose LFEC3E-3TN100I?

The LFEC3E-3TN100I is positioned for engineers who need a compact, industrial-grade FPGA that balances logic capacity, on-chip memory and flexible I/O in a low-voltage, surface-mount form factor. Its combination of approximately 3,100 logic elements, 56,320 bits of on-chip RAM, 67 I/Os and family-level system features makes it suitable for control, interface and mid-density embedded applications.

Choosing this device provides a clear upgrade path within the LatticeECP/EC family for projects that may require density migration, and it benefits from family tools and IP to accelerate development cycles and system integration.

Request a quote or submit an inquiry to receive pricing, lead-time and availability details for the LFEC3E-3TN100I.

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