LFSC3GA25E-6F900C

IC FPGA 378 I/O 900FBGA
Part Description

SC Field Programmable Gate Array (FPGA) IC 378 1966080 25000 900-BBGA

Quantity 1,206 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package900-FPBGA (31x31)GradeCommercialOperating Temperature0°C – 85°C
Package / Case900-BBGANumber of I/O378Voltage950 mV - 1.26 V
Mounting MethodSurface MountRoHS ComplianceRoHS non-compliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs6250Number of Logic Elements/Cells25000
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits1966080

Overview of LFSC3GA25E-6F900C – SC Field Programmable Gate Array (FPGA), 25,000 logic elements, 378 I/Os, 900-BBGA

The LFSC3GA25E-6F900C is a commercial-grade FPGA from Lattice Semiconductor’s SC family, offering a high-performance FPGA fabric combined with abundant embedded memory and high I/O density. It is designed for communication and embedded-system applications that require a balance of logic capacity, on-chip RAM, and multi-gigabit serial/transceiver options provided by the SC family architecture.

Key hardware attributes include 25,000 logic elements, approximately 1.97 Mbits of embedded RAM, 378 user I/Os, and a 900-ball FPBGA package—delivering a compact, surface-mount solution for complex protocol and interface integration at core voltages from 0.95 V to 1.26 V and a commercial temperature range of 0 °C to 85 °C.

Key Features

  • Logic Capacity — 25,000 logic elements suitable for medium-complexity FPGA designs and configurable system functions.
  • Embedded Memory — Approximately 1.97 Mbits of on-chip RAM to support buffers, FIFOs, and memory-intensive logic.
  • High I/O Density — 378 I/Os for extensive external interfacing and board-level connectivity.
  • High-Speed SERDES and Protocol Support — SC family devices include 4 to 32 high-speed SERDES and flexiPCS options (family-level), with supported line rates up to 3.8 Gbps and PCS implementations for standards such as GbE, XAUI, PCI Express and Fibre Channel.
  • Advanced I/O Performance — PURESPEED™ I/O architecture (family-level) supports differential I/O up to 2 Gbps DDR and includes features such as programmable input delay and on-die termination for robust high-speed interfaces.
  • Clocking and Timing — Family-level sysCLOCK features include multiple PLLs and DLLs, 700 MHz global clocks and 1 GHz edge clocks for demanding timing domains and clock management.
  • Package and Mounting — 900-BBGA package; supplier device package listed as 900-FPBGA (31×31). Surface-mount mounting type for compact board designs.
  • Power and Temperature — Core supply range 0.95 V to 1.26 V and commercial operating temperature range 0 °C to 85 °C. RoHS compliant.
  • System-Level Support (family-level) — Includes support for IEEE 1149.1 boundary scan, IEEE 1532 in-system configuration, onboard oscillator, and embedded system interfaces noted in the SC family documentation.

Typical Applications

  • Network and Communications Equipment — Implements protocol engines, packet buffering and multi-gigabit serialization for equipment using GbE, XAUI, PCI Express, and other common link standards (family-level PCS support).
  • High-Speed Interface Bridges — Acts as a flexible bridge and protocol adapter between different high-speed I/O standards and memory interfaces using the device’s high I/O count and PURESPEED™ capabilities.
  • Embedded System Integration — Integrates custom logic, peripheral interfaces and on-chip memory to reduce external component count in compact embedded platforms.
  • Data Buffering and Packet Processing — Leverages approximately 1.97 Mbits of embedded RAM for FIFOs, packet buffering, and memory-intensive FPGA functions.

Unique Advantages

  • Balanced Logic-to-Memory Ratio: 25,000 logic elements paired with approximately 1.97 Mbits of embedded RAM provide a practical balance for mid-range designs that need both logic and storage on-chip.
  • High I/O Count: 378 I/Os enable broad connectivity for multi-interface boards and dense peripheral integration without immediate need for external IO expanders.
  • Family-Level High-Speed Capabilities: SC family SERDES and flexiPCS support multi-gigabit links and pre-engineered PCS blocks, accelerating implementation of common communication standards.
  • Compact, Surface-Mount Package: 900-ball FPBGA packaging offers a high pin-count solution in a surface-mount form factor for space-constrained designs.
  • Low-Voltage Core Operation: Operates across a 0.95 V to 1.26 V supply range to match modern low-voltage system architectures.
  • Compliance and Board-Level Readiness: Commercial temperature grade (0 °C to 85 °C) and RoHS compliance support standard production and regulatory requirements.

Why Choose LFSC3GA25E-6F900C?

The LFSC3GA25E-6F900C positions itself as a compact, memory-rich FPGA option within the Lattice SC family—delivering 25,000 logic elements, a high I/O count and approximately 1.97 Mbits of embedded RAM. It is well suited to designers who need a balanced mix of logic capacity, on-chip memory and multi-gigabit interface options in a 900-ball FPBGA package for communication and embedded applications.

For teams building network interfaces, protocol bridges, or embedded controllers that require configurable logic, deterministic clocking options and dense board-level connectivity, this device offers a scalable platform backed by SC family system features and on-chip resources that simplify integration and reduce external BOM.

Request a quote or submit an inquiry to receive pricing, availability, and additional technical support for LFSC3GA25E-6F900C.

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