XC6VSX475T-2FFG1759E
| Part Description |
Virtex®-6 SXT Field Programmable Gate Array (FPGA) IC 840 39223296 476160 1759-BBGA, FCBGA |
|---|---|
| Quantity | 1,635 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | AMD |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 12 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1759-FCBGA (42.5x42.5) | Grade | Extended | Operating Temperature | 0°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1759-BBGA, FCBGA | Number of I/O | 840 | Voltage | 950 mV - 1.05 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 4 (72 Hours) | Number of LABs/CLBs | 37200 | Number of Logic Elements/Cells | 476160 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 39223296 |
Overview of XC6VSX475T-2FFG1759E – Virtex®-6 SXT Field Programmable Gate Array (FPGA) IC 840 39223296 476160 1759-BBGA, FCBGA
The XC6VSX475T-2FFG1759E is a Virtex-6 SXT Field Programmable Gate Array from AMD, offering high-capacity programmable logic in an FCBGA package. It provides 476,160 logic elements, approximately 39.2 Mbits of embedded RAM, and up to 840 I/O pins for dense, configurable system designs.
Packaged as a 1759-FCBGA (42.5×42.5 mm) with surface-mount mounting and an extended-grade operating range (0 °C to 100 °C), this device is RoHS compliant and operates with a core supply range of 0.95 V to 1.05 V.
Key Features
- Core / Logic 476,160 logic elements to implement highly parallel, complex digital functions.
- Embedded Memory Approximately 39.2 Mbits of on-chip RAM for buffering, look-up tables, and memory-intensive algorithms.
- High I/O Count Up to 840 I/O pins to support wide bus interfaces and high-pin-count system interconnects.
- Power / Voltage Core voltage supply range of 0.95 V to 1.05 V, suitable for the device’s defined power envelope.
- Package & Mounting 1759-FCBGA package (42.5×42.5 mm), surface-mount format with 1759-BBGA/FCBGA package case designation for board-level integration.
- Temperature & Grade Extended grade with an operating temperature range of 0 °C to 100 °C for demanding environments.
- Environmental Compliance RoHS compliant, meeting common environmental material requirements.
Typical Applications
- High-density signal processing — Use the extensive logic and on-chip RAM to implement complex signal processing blocks and algorithm acceleration.
- High-pin-count interfacing — Leverage up to 840 I/O pins for multi-channel data aggregation, protocol bridging, and board-level connectivity.
- System integration and prototyping — Consolidate multiple functions into a single FPGA fabric to reduce component count and iterate system designs quickly.
Unique Advantages
- Large logic capacity: 476,160 logic elements enable implementation of substantial FPGA designs without immediate upscaling.
- Significant on-chip memory: Approximately 39.2 Mbits of embedded RAM supports buffering, deep pipelines, and memory-hungry functions on-chip.
- Extensive I/O resources: 840 I/Os provide flexibility for wide parallel interfaces and multiple simultaneous connections.
- Robust packaging: 1759-FCBGA (42.5×42.5 mm) surface-mount package supports dense PCB integration and thermal management considerations.
- Extended operating grade: Rated 0 °C to 100 °C for applications requiring broader-than-commercial temperature coverage.
- RoHS compliant: Meets environmental material restrictions for regulated markets.
Why Choose XC6VSX475T-2FFG1759E?
The XC6VSX475T-2FFG1759E positions itself as a high-capacity Virtex-6 SXT FPGA that balances large programmable logic resources, substantial on-chip memory, and a high I/O count in a compact 1759-FCBGA package. Its extended-grade temperature range and RoHS compliance make it suitable for designs that require durability and regulatory material adherence.
This device is well suited to engineering teams developing complex, memory- and I/O-intensive FPGA designs that benefit from consolidating functions onto a single programmable device while maintaining well-defined electrical and packaging specifications.
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