JSR362G088NHW-L
| Part Description |
2Gb DDR3L SDRAM (78‑FBGA) |
|---|---|
| Quantity | 1,774 Available (as of June 16, 2026) |
| Product Category | DRAM Memory |
|---|---|
| Manufacturer | Jeju Semiconductor Corporation |
| Manufacturing Status | Mass Production |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 78-BGA (7.5x11.0mm) | Memory Format | RAM | Technology | SDRAM - DDR3L | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 2 Gbit | Access Time | 13.91 ns | Grade | Commercial | ||
| Clock Frequency | 933 MHz | Voltage | 1.35V | Memory Type | Volatile | ||
| Operating Temperature | 0°C - 85°C | Mounting Method | Surface Mount | Memory Interface | DDR3L SDRAM | ||
| Memory Organization | x8 | Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | ||
| REACH Compliance | REACH Unknown | ECCN | EAR99 | HTS Code | 8542.32.00.36 |
Overview of JSR362G088NHW-L – 2Gb DDR3L SDRAM (78‑FBGA)
The JSR362G088NHW-L is a 2 Gbit DDR3L SDRAM device from Jeju Semiconductor, organized as x8 and optimized for low-voltage 1.35 V operation. It implements a DDR3(L) double data‑rate architecture with an 8‑bit prefetch pipelined core and supports high data rates up to 2133 MT/s as specified in the series datasheet.
Designed for commercial‑grade applications, the device offers a compact 78‑ball FBGA package and features such as on‑die termination, ZQ calibration and flexible CAS/CWL settings, making it suitable for systems that require a high‑performance board‑level SDRAM solution within a 0 °C to +85 °C operating range.
Key Features
- Memory Architecture — 2 Gbit density organized as 8 banks × 32M words × 8 bits (x8 organization) with a 1KB page size, supporting burst lengths of 8 and 4 (with Burst Chop).
- High‑Performance Operation — Supports DDR3 data rates including 1333/1600/1866 and up to 2133 MT/s (max) with CAS latencies selectable across a broad range (CL = 5–14) and CAS write latency (CWL = 5–10).
- Low‑Voltage Power — DDR3L power supply VDD/VDDQ = 1.35 V (operational range 1.283 to 1.45 V) with backward compatibility to 1.5 V DDR3 operation.
- Signal Integrity & Timing — Bi‑directional differential DQS, differential clock inputs, DLL for alignment, On‑Die Termination (ODT) and ZQ calibration for controlled drive/ODT characteristics.
- Advanced Control Features — Support for posted CAS (programmable additive latency), Multi Purpose Register (MPR) for predefined pattern readout, programmable partial array self‑refresh (PASR), and refresh modes including auto‑refresh and self‑refresh.
- Package & Mounting — 78‑ball FBGA surface‑mount package (78‑BGA, 7.5 × 11.0 mm) suitable for compact board designs.
- Compliance & Grade — Commercial grade device with RoHS compliance and lead‑free/halogen‑free packaging as described in the series documentation.
- Thermal & Timing — Operating temperature range of 0 °C to 85 °C (commercial grade) and key timing such as an access time of 13.91 ns (typical for specific speed grades).
Typical Applications
- Commercial embedded systems — Board‑level system memory where 2 Gbit DDR3L density and low‑voltage operation are required for compact, power‑sensitive designs.
- Consumer electronics — Temporary working memory and frame buffers in devices that benefit from DDR3L performance and compact 78‑FBGA packaging.
- Networking and communications equipment — Packet buffers and data path memory that leverage the device’s high data rates and adjustable timing parameters.
- Storage and controller boards — Memory for controller caches and temporary storage tasks where DDR3L interface compatibility and ODT/ZQ calibration support signal integrity needs.
Unique Advantages
- Low‑voltage operation (1.35 V) — Reduces power consumption compared with higher‑voltage DDR3 options while maintaining DDR3 compatibility for flexible system design.
- Scalable performance — Supports a range of data rates up to 2133 MT/s and multiple CAS/CWL settings, enabling designers to tune performance for application requirements.
- Signal quality controls — On‑Die Termination, synchronous/dynamic/asynchronous ODT options and ZQ calibration help maintain signal integrity on high‑speed interfaces.
- Compact, surface‑mount package — 78‑ball FBGA (7.5 × 11.0 mm) provides a small footprint for space‑constrained PCB layouts.
- Flexible refresh and self‑refresh modes — Auto‑refresh, self‑refresh and programmable PASR support power‑aware designs and reliable data retention.
- Standards‑aligned timing — JEDEC‑compliant DDR3 timing capabilities and selectable CAS/CWL values for interoperability with common DDR3 memory controllers.
Why Choose JSR362G088NHW-L?
The JSR362G088NHW-L delivers a balanced combination of density, performance and low‑voltage efficiency in a compact 78‑FBGA package, making it well suited for commercial embedded and board‑level memory applications. With support for high DDR3(L) data rates, programmable timing options, and signal integrity features such as ODT and ZQ calibration, it provides designers the flexibility to optimize throughput and power for a range of system requirements.
Its RoHS‑compliant, lead‑free packaging and commercial temperature rating support reliable integration into production designs where standard DDR3L performance and form factor matter. The device is appropriate for customers seeking a verifiable 2 Gbit DDR3L SDRAM solution with documented timing and control features as detailed in the series documentation.
Request a quote or submit an inquiry to receive pricing, availability and the full datasheet for the JSR362G088NHW-L.

Date Founded: 2000
Headquarters: Jeju-si, Jeju-do, Republic of Korea
Employees: 100+
Revenue: $100 Million
Certifications and Memberships: ISO9001:2015, ISO14001:2015, AEC-Q100, RoHS, REACH