LX2160SN72029B
| Part Description |
ARM® Cortex®-A72 Microprocessor IC QorlQ LX2 16 Core, 64-Bit 2GHz 1517-FCPBGA (40x40) |
|---|---|
| Quantity | 234 Available (as of October 8, 2026) |
| Product Category | Microprocessors |
|---|---|
| Part Series | LX2160S |
| Manufacturer | NXP USA Inc. |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 18 Weeks |
| Datasheet |
Specifications & Environmental
| Core Processor | ARM® Cortex®-A72 | Device Package | 1517-FCPBGA (40x40) | ECCN | 3A991A2 | ||
|---|---|---|---|---|---|---|---|
| Ethernet | 100Gbps (2) | Graphics Acceleration | Yes | HTS Code | 8542.31.0001 | ||
| Moisture Sensitivity Level | N/A | Mounting Method | Surface Mount | Mounting Type | Surface Mount | ||
| Number of Cores/Bus Width | 16 Core, 64-Bit | Operating Temperature | 0°C ~ 105°C (TJ) | Package / Case | 1517-BBGA, FCBGA | ||
| RAM Controllers | DDR4 | REACH Compliance | REACH Unaffected | RoHS Compliance | ROHS3 Compliant | ||
| SATA | SATA 3.0 (4) | Security Features | Secure Boot, TrustZone® | Speed | 2GHz | ||
| Supplier Device Package | 1517-FCPBGA (40×40) | USB | USB 3.0 (2) + PHY (2) | Voltage – I/O | 1.2V, 1.8V, 3.3V |
Overview of LX2160SN72029B – IC MPU QORLQ LX2 2GHZ 1517FCPBGA
The LX2160SN72029B is a high-performance multicore microprocessor featuring a 16-core, 64-bit Arm Cortex‑A72 architecture operating at 2 GHz. It integrates compute, packet handling and accelerator resources to address compute‑intensive networking and edge processing applications.
Designed for demanding networking, data‑center offload and 5G packet processing use cases, the device emphasizes performance, high‑speed I/O integration and on‑chip security features to simplify system design and reduce external component count.
Key Features
- Core Sixteen 64‑bit Arm Cortex‑A72 CPU cores running at 2 GHz provide multi‑threaded compute capability for control‑plane and data‑plane workloads.
- Memory and Cache Dual DDR4 controllers (2 × DDR4 72b) with ECC support up to 3200 MT/s and a maximum capacity reported in the family; includes on‑chip cache (16 MB) and a 2 MB packet caching buffer for lower latency packet handling.
- Networking and Packet Processing Integrated wire‑rate I/O processor with 18 MACs, dual 100 Gbit/s Ethernet ports, support for up to 16 Ethernet ports and a 122 Gbit/s Layer‑2 switch for high‑throughput network applications.
- Security and Acceleration On‑chip security acceleration with a 50 Gbit/s security engine plus Secure Boot and Arm TrustZone® support; includes a 100 Gbit/s compression/decompression engine for data throughput optimization.
- High‑Speed SerDes and PCIe Up to 24 SerDes lanes operating to 25 GHz and support for up to 24 PCIe Gen3 lanes (multiple ports, as wide as x8) enable flexible high‑speed connectivity to NICs, FPGAs and accelerators.
- Peripheral Interfaces Rich I/O including 4 × SATA 3.0, 2 × USB 3.0 plus PHYs, SD/eMMC, 2 × DUART, 8 × I2C and CAN (CAN FD optional), supporting diverse system integration scenarios.
- Graphics Acceleration Graphics acceleration capability is present to support workloads that benefit from offloaded graphics processing.
- Package and Thermal Supplied in a 1517‑FCPBGA (40 × 40) surface‑mount package; operating temperature range 0 °C to 105 °C. RoHS compliant.
Typical Applications
- Networking Infrastructure Ideal for top‑of‑rack (TOR), end‑of‑row (EOR) and white‑box switching control and data‑plane applications that need multi‑core processing and high‑speed Ethernet connectivity.
- Data Center Offload Suitable for NICs and accelerator offload functions where PCIe Gen3 lanes, high throughput Ethernet and hardware compression/security engines reduce host CPU load.
- 5G Packet Processing Targets C‑RAN, O‑RAN and packet processing tasks requiring deterministic packet handling and hardware acceleration for IPsec and compression.
- Edge and Industrial Computing Provides a compact, integrated platform for edge compute tasks such as packet inspection, control‑plane functions and sensor data aggregation in constrained board space.
Unique Advantages
- High parallel processing density: Sixteen Arm Cortex‑A72 cores deliver the multi‑threaded compute needed for concurrent networking and control tasks.
- Integrated networking fabric: Dual 100 Gbit/s ports, multiple Ethernet MACs and a 122 Gbit/s L2 switch reduce external switch and PHY requirements.
- Hardware security and compression offload: Built‑in 50 Gbit/s security acceleration plus a 100 Gbit/s compression/decompression engine offloads heavy datapath work from software.
- Flexible, high‑speed I/O: Up to 24 SerDes lanes (to 25 GHz) and multiple PCIe Gen3 lanes provide headroom for high‑bandwidth peripherals and accelerators.
- Large memory bandwidth and on‑chip packet buffering: Dual DDR4 with ECC and on‑chip packet cache reduce external memory dependency and lower latency for packet processing.
- System readiness and compliance: Surface‑mount 1517‑FCPBGA package, wide operating temperature up to 105 °C and RoHS compliance simplify integration and regulatory alignment.
Why Choose LX2160SN72029B?
The LX2160SN72029B positions itself as a highly integrated communications processor that combines multi‑core compute, high‑speed networking, security accelerators and extensive I/O in a single package. Its architecture and on‑chip resources are tailored to systems that require sustained packet throughput, offload capabilities and flexible connectivity while minimizing board complexity.
This part is well suited to designers building networking platforms, edge servers, data‑center offload cards and 5G packet processing equipment that value integrated accelerators, high memory throughput and robust I/O. Supported development software referenced for the family includes Linux SDKs and embedded toolchains to accelerate system bring‑up and software development.
Request a quote or submit an inquiry for pricing and availability to evaluate LX2160SN72029B for your next networking or edge compute design.

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