1ST110EN1F43I2LG
| Part Description |
Stratix® 10 TX Field Programmable Gate Array (FPGA) IC 440 1100000 1760-BBGA, FCBGA |
|---|---|
| Quantity | 1,235 Available (as of May 6, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 12 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1760-FBGA (42.5x42.5) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1760-BBGA, FCBGA | Number of I/O | 440 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 137500 | Number of Logic Elements/Cells | 1100000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 112197632 |
Overview of 1ST110EN1F43I2LG – Stratix® 10 TX Field Programmable Gate Array (FPGA), 1,100,000 logic elements, 440 I/Os, 1760-BBGA
The 1ST110EN1F43I2LG is an Intel Stratix® 10 TX family FPGA offering a high-density, high-performance programmable fabric targeted at bandwidth- and compute-intensive systems. The device is built around Intel’s Hyperflex® core architecture and the Stratix 10 TX device innovations described in the product overview.
This part combines 1,100,000 logic elements, 112,197,632 bits of on-chip RAM, and 440 general-purpose I/Os in a 1760-BBGA (1760-FBGA, 42.5 × 42.5 mm) surface-mount package, making it suitable for industrial-class designs that require large logic capacity, substantial memory, and broad I/O connectivity.
Key Features
- Core architecture Intel Hyperflex® core architecture as described for Stratix 10 TX devices, delivering a step-change in core performance compared to previous-generation high-performance FPGAs.
- Logic resources 1,100,000 logic elements, providing large-scale programmable logic capacity for complex designs.
- Internal memory 112,197,632 total RAM bits on-chip to support large buffering, packet processing, and on-chip data storage requirements.
- High-speed transceivers Series-level Stratix 10 TX transceiver capability includes dual-mode operation (57.8 Gbps PAM4 and 28.9 Gbps NRZ) and support for high-density transceiver tiles suitable for chip-to-chip, chip-to-module, and backplane applications.
- Hardened interface IP Stratix 10 TX family devices include hardened PCI Express Gen3 and 10/25/100 Gbps Ethernet MAC IP blocks with Reed–Solomon FEC for applicable signal modes.
- DSP and memory subsystem Variable-precision DSP block support and embedded memory features in the Stratix 10 TX family enable intensive signal processing and high-throughput compute tasks.
- Package and I/O 1760-BBGA FCBGA package (supplier package: 1760-FBGA, 42.5 × 42.5 mm), surface-mount mounting, and 440 I/Os for high-density board integration.
- Power and thermal Core voltage supply range of 820 mV to 880 mV and industrial operating temperature range of −40 °C to 100 °C.
- Industrial grade Specified as Industrial grade for deployment in applications that require extended operating temperature support.
Typical Applications
- High-bandwidth networking and data center Use the device’s high-speed transceivers and hardened Ethernet/PCIe IP to implement switching, routing, and interconnect functions with large on-chip memory for packet buffering.
- Backplane and module interfaces Support chip-to-chip, chip-to-module, and backplane connectivity with dual-mode transceivers capable of PAM4 and NRZ operation.
- Compute acceleration and signal processing Leverage 1,100,000 logic elements, extensive on-chip RAM, and variable-precision DSP resources for hardware acceleration of DSP, ML inference, and real-time data processing.
- Embedded systems and heterogeneous platforms Deploy in designs that require large programmable fabric density and integration with hardened system IP (select family devices include an embedded Arm® Cortex‑A53 HPS).
Unique Advantages
- High programmable capacity: 1,100,000 logic elements enable complex logic, large state machines, and multiple concurrent functions on a single device.
- Substantial on-chip memory: 112,197,632 bits of RAM reduce external memory dependency and improve latency for buffering and dataflow workloads.
- Dual-mode high-speed I/O: Transceiver capability for 57.8 Gbps PAM4 and 28.9 Gbps NRZ supports modern high-bandwidth link requirements for module, board, and backplane designs.
- Integrated hardened IP: Availability of PCI Express Gen3 and high-rate Ethernet MAC IP with Reed–Solomon FEC streamlines integration of common high-speed protocols.
- Robust industrial operating range: −40 °C to 100 °C rating and surface-mount 1760-BBGA packaging support deployment in industrial environments.
- Compact high-density package: 1760-FBGA (42.5 × 42.5 mm) delivers large I/O and logic capacity in a package suitable for high-density board layouts.
Why Choose 1ST110EN1F43I2LG?
The 1ST110EN1F43I2LG brings Stratix 10 TX family innovations—Hyperflex core architecture, high-speed dual-mode transceivers, hardened protocol IP, and extensive on-chip memory—into a single high-density FPGA package. Its combination of 1,100,000 logic elements, 112,197,632 bits of RAM, and 440 I/Os in a 1760-BBGA package positions the device for demanding networking, compute acceleration, and embedded applications that require significant programmable resources and industrial temperature support.
Choose this device when your design requires large programmable capacity, high I/O and transceiver density, and a validated Stratix 10 TX device architecture to address next-generation bandwidth and processing challenges.
Request a quote or submit a pricing inquiry to check availability and receive technical and purchasing assistance for 1ST110EN1F43I2LG.

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