5SGSMD3H2F35I2L
| Part Description |
Stratix® V GS Field Programmable Gate Array (FPGA) IC 432 13312000 236000 1152-BBGA, FCBGA |
|---|---|
| Quantity | 1,177 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 1152-FBGA (35x35) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1152-BBGA, FCBGA | Number of I/O | 432 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 89000 | Number of Logic Elements/Cells | 236000 | ||
| Number of Gates | N/A | ECCN | 3A001A2C | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 13312000 |
Overview of 5SGSMD3H2F35I2L – Stratix® V GS FPGA, 236,000 logic elements, 432 I/O, 1152‑BBGA
The 5SGSMD3H2F35I2L is a Stratix V GS field‑programmable gate array (FPGA) from Intel, built on a 28‑nm process and optimized for DSP‑centric, high‑bandwidth, and data‑intensive applications. This industrial‑grade device combines a high logic element count with abundant embedded memory and a large I/O complement to support complex signal processing and networking designs.
Targeted use cases include transceiver‑based DSP, packet and optical processing, and prototyping paths that leverage Stratix V family hard IP and ASIC migration options. The device is supplied in a 1152‑BBGA surface‑mount package and operates across a wide industrial temperature range.
Key Features
- Logic Capacity — 236,000 logic elements to implement complex custom logic and control functions.
- Embedded Memory — Approximately 13.3 Mbits of on‑chip RAM for buffering, look‑up tables, and intermediate storage.
- DSP & Arithmetic — As a Stratix V GS device, the family provides variable‑precision DSP blocks and supports up to 3,926 18×18 or 1,963 27×27 multipliers (family capability).
- I/O and Transceivers — 432 general I/O pins and GS‑class integrated transceivers with 14.1‑Gbps data‑rate capability (family feature) for high‑speed serial interfaces.
- Core Architecture — 28‑nm device architecture with redesigned adaptive logic modules (ALMs), fractional PLLs, and a multi‑track routing fabric (family features).
- Package & Mounting — 1152‑BBGA (1152‑FBGA / 35×35) surface‑mount package suitable for dense board integration.
- Power & Voltage — Core voltage supply range 820 mV to 880 mV for system power planning.
- Operating Range & Grade — Industrial grade with an operating temperature range of −40 °C to 100 °C.
- Compliance — RoHS compliant.
Typical Applications
- High‑performance DSP systems — Implement variable‑precision filtering, FFTs, and custom arithmetic using the Stratix V GS DSP resources and substantial logic fabric.
- Telecom and Optical Transport — Support for high‑speed serial interfaces and large on‑chip memory makes the device suitable for 40G/100G class packet and optical processing tasks.
- Network and Packet Processing — Large logic density and many I/Os enable complex packet engines, traffic management, and protocol offload functions.
- Prototyping and ASIC Migration — Stratix V family features an Embedded HardCopy Block and a documented path for low‑risk migration to HardCopy V ASICs for volume production.
Unique Advantages
- High logic density: 236,000 logic elements provide significant capacity for large, integrated designs and multi‑function systems.
- Substantial on‑chip memory: Approximately 13.3 Mbits of embedded RAM reduces reliance on external memory for buffering and data staging.
- Strong DSP capability: Family support for thousands of DSP multipliers enables high‑precision, high‑throughput signal processing implementations.
- High‑speed interfacing: GS family transceivers with 14.1‑Gbps capability and 432 I/Os facilitate demanding serial and parallel connectivity needs.
- Industrial robustness: Industrial temperature rating (−40 °C to 100 °C) and surface‑mount BBGA packaging support deployment in challenging environments.
- ASIC migration path: Embedded HardCopy Block and Stratix V family support provide a clear route from prototype FPGA to production HardCopy V ASIC if required.
Why Choose 5SGSMD3H2F35I2L?
The 5SGSMD3H2F35I2L is positioned for engineers who require a high‑capacity, DSP‑oriented FPGA with substantial on‑chip memory, broad I/O, and industrial operating range. Its Stratix V GS family heritage delivers architecture and hard‑IP building blocks suited to bandwidth‑centric and data‑intensive applications.
Choosing this device supports scalable development: implement complex algorithms and high‑speed interfaces on the FPGA and maintain a documented path to HardCopy ASICs for production scaling. The combination of logic, memory, DSP capability, and industrial packaging makes it a strong candidate for communication, signal processing, and high‑performance embedded systems.
Request a quote or submit a pricing and availability inquiry to begin evaluating the 5SGSMD3H2F35I2L for your next design.

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