5SGSMD4H2F35C3N
| Part Description |
Stratix® V GS Field Programmable Gate Array (FPGA) IC 432 19456000 360000 1152-BBGA, FCBGA |
|---|---|
| Quantity | 773 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 1152-FBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1152-BBGA, FCBGA | Number of I/O | 432 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 135840 | Number of Logic Elements/Cells | 360000 | ||
| Number of Gates | N/A | ECCN | 3A001A2C | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 19456000 |
Overview of 5SGSMD4H2F35C3N – Stratix® V GS FPGA, 360,000 logic elements, 1152‑BBGA
The 5SGSMD4H2F35C3N is a Stratix V GS field-programmable gate array (FPGA) from Intel, built on the 28‑nm Stratix V family architecture. It targets transceiver-based, DSP-centric designs and integrates high-density logic, variable-precision DSP capability, and high-speed transceiver support for demanding signal-processing and data‑plane applications.
Designed for commercial-temperature systems, this device combines large on‑chip memory and abundant I/O in a compact 1152‑BBGA (35×35) surface‑mount package, offering a scalable platform for high-performance communications, broadcast, and compute-focused designs.
Key Features
- Core architecture — 28‑nm Stratix V family with a redesigned adaptive logic module (ALM) and a comprehensive fabric clocking and multi‑track routing network for flexible logic implementation.
- Logic capacity — 360,000 logic elements to implement large-scale custom logic, state machines, and control functions.
- Embedded memory — Approximately 19.46 Mbits of on‑chip RAM organized in 20 Kbit (M20K) blocks for high-bandwidth buffering and on‑chip storage.
- DSP and multiplier resources — Stratix V GS devices offer abundant variable‑precision DSP blocks, supporting up to 3,926 18×18 or 1,963 27×27 multipliers for high‑performance signal processing.
- Integrated transceivers — GS variant transceivers with 14.1‑Gbps data‑rate capability for backplane and optical interface applications and high‑speed serial links.
- I/O and package — 432 I/Os in a 1152‑BBGA (FCBGA) supplier package 1152‑FBGA (35×35), surface‑mount mounting for dense board integration.
- Power and thermal — Core supply voltage range 820 mV to 880 mV; commercial operating temperature 0 °C to 85 °C.
- Embedded hard IP — Includes an Embedded HardCopy Block used to harden IP instantiation of PCIe Gen3, Gen2, and Gen1.
- RoHS compliant — Meets RoHS environmental requirements.
Typical Applications
- High‑performance computing (HPC) — Implement large DSP kernels and custom accelerators using variable‑precision DSP blocks and dense logic resources.
- Wireline and optical communications — Provide transceiver support and on‑chip buffering for backplane and optical interfaces, including 40G/100G data paths.
- Broadcast and professional video — Real‑time signal processing and format conversion using extensive DSP and embedded memory resources.
- Military and communications systems — Deploy transceiver‑based, DSP‑centric processing chains for packet processing, modulation, and channel equalization.
Unique Advantages
- High logic density: 360,000 logic elements enable large custom designs and complex control logic without partitioning across multiple devices.
- Substantial on‑chip memory: Approximately 19.46 Mbits of embedded RAM delivered in M20K blocks reduces reliance on external memory for buffering and local storage.
- Purpose‑built DSP resources: Variable‑precision DSP blocks with thousands of multiplies accelerate signal processing workloads and algorithmic implementations.
- Integrated high‑speed serial I/O: 14.1‑Gbps transceiver capability supports modern backplane and optical interfaces for high bandwidth transfer.
- Compact, production‑ready package: 1152‑BBGA (35×35) surface‑mount package balances I/O count and board density for production systems.
- Path to hardened ASICs: Embedded HardCopy capability and family support provide a defined route from FPGA prototyping to HardCopy V ASICs for higher volume production.
Why Choose 5SGSMD4H2F35C3N?
The 5SGSMD4H2F35C3N positions itself as a high‑capacity, DSP‑focused Stratix V GS FPGA suitable for designers needing dense logic, substantial on‑chip memory, and robust transceiver performance in a commercial‑temperature part. Its combination of logic elements, variable‑precision DSP resources, and integrated transceivers makes it well suited for data‑intensive signal‑processing, communications, and compute acceleration tasks.
For teams developing high‑bandwidth or DSP‑centric systems, this device offers a scalable platform with a clear development path toward hardened ASIC implementations, enabling prototyping and production planning on a common architecture.
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