5SGSMD5H1F35C2L
| Part Description |
Stratix® V GS Field Programmable Gate Array (FPGA) IC 552 39936000 457000 1152-BBGA, FCBGA |
|---|---|
| Quantity | 1,149 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 1152-FBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1152-BBGA, FCBGA | Number of I/O | 552 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 172600 | Number of Logic Elements/Cells | 457000 | ||
| Number of Gates | N/A | ECCN | 3A001A2C | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 39936000 |
Overview of 5SGSMD5H1F35C2L – Stratix® V GS FPGA, 1152-BBGA (35×35)
The 5SGSMD5H1F35C2L is a Stratix V GS field-programmable gate array (FPGA) in a 1152-BBGA / 1152-FBGA (35×35) package. It is built on the Stratix V architecture and is targeted at transceiver-based, DSP-centric designs and data-intensive applications.
With on-chip resources that include approximately 457,000 logic elements, abundant embedded memory and high I/O density, this commercial-grade device suits applications that require substantial DSP capability, high-bandwidth interfaces and extensive on-chip integration.
Key Features
- Core architecture — Stratix V family architecture with an enhanced core and multi-track routing fabric designed for high-performance, data-centric designs.
- Logic resources — Approximately 457,000 logic elements for implementing large, complex logic and packet-processing functions.
- Embedded memory — Approximately 39.9 Mbits of on-chip RAM (Total Ram Bits: 39,936,000) to support data buffering and intermediate storage without relying solely on external memory.
- DSP capabilities — GS variant provides an abundance of variable-precision DSP blocks suitable for high-performance signal processing workflows.
- Transceivers and high-speed interfaces — GS devices include integrated transceivers with multi-gigabit capability for backplane and optical interfaces, suitable for bandwidth-centric applications.
- I/O and package — 552 dedicated I/O pins in a 1152-BBGA, FCBGA package; supplier package listed as 1152-FBGA (35×35), enabling dense board-level connectivity.
- Power — Core voltage supply range from 820 mV to 880 mV to match Stratix V power domains.
- Commercial grade and compliance — Commercial-grade device rated for 0 °C to 85 °C operating temperature and RoHS compliant.
- Embedded hard IP — Stratix V family includes Embedded HardCopy Block capability for hardened IP instantiations such as PCIe generation implementations.
Typical Applications
- High-performance DSP systems — Use the device’s variable-precision DSP blocks and large logic capacity for signal processing tasks in compute- and latency-sensitive designs.
- Telecom and optical transport — Integrated multi-gigabit transceivers and high I/O count make it suited to 40G/100G-class transport and backplane interfaces.
- Network and packet processing — Dense logic and on-chip memory support complex packet handling, traffic management and protocol processing functions.
- Broadcast and military communications — DSP-centric architecture and transceiver support address the needs of high-throughput broadcast, wireline and communications equipment.
Unique Advantages
- Substantial on-chip logic: Approximately 457,000 logic elements provide the capacity to implement large-scale algorithms and multi-function systems on a single device.
- Significant embedded memory: Approximately 39.9 Mbits of RAM reduces dependence on external memory for buffering and state storage, simplifying board-level design.
- High I/O density: 552 I/O pins in a compact FCBGA package support dense interface routing for complex boards and mezzanine connections.
- DSP-focused architecture: Variable-precision DSP blocks in the GS variant enable efficient implementation of multiply-intensive signal processing workloads.
- Commercial temperature and RoHS compliance: Rated for 0 °C to 85 °C and RoHS compliant for applications within commercial operating environments.
- Embedded hard IP options: Support for Embedded HardCopy Blocks to harden IP instantiations (for example, PCIe generations) provides a path to hardened implementations.
Why Choose 5SGSMD5H1F35C2L?
The 5SGSMD5H1F35C2L offers a balance of dense logic, sizable embedded memory and high I/O count in a commercial-grade Stratix V GS device. Its architecture and on-chip resources make it appropriate for transceiver-based, DSP-heavy and bandwidth-centric designs where on-chip integration and performance are priorities.
Engineers developing data-intensive communications, networking, broadcast or high-performance compute subsystems can leverage the Stratix V family features—such as variable-precision DSP blocks, integrated transceivers and Embedded HardCopy Block support—to build scalable, integrated solutions with reduced external component count.
Request a quote or submit a purchase inquiry to get pricing and availability for the 5SGSMD5H1F35C2L. Our team can provide lead-time and ordering information to help you move from evaluation to production.

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