5SGSMD5H3F35C2N

IC FPGA 552 I/O 1152FBGA
Part Description

Stratix® V GS Field Programmable Gate Array (FPGA) IC 552 39936000 457000 1152-BBGA, FCBGA

Quantity 609 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package1152-FBGA (35x35)GradeCommercialOperating Temperature0°C – 85°C
Package / Case1152-BBGA, FCBGANumber of I/O552Voltage870 mV - 930 mV
Mounting MethodSurface MountRoHS ComplianceRoHS CompliantREACH ComplianceREACH Unknown
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs172600Number of Logic Elements/Cells457000
Number of GatesN/AECCN3A001A2CHTS Code8542.39.0001
QualificationN/ATotal RAM Bits39936000

Overview of 5SGSMD5H3F35C2N – Stratix® V GS FPGA, 1152-BBGA

The 5SGSMD5H3F35C2N is a Stratix® V GS field-programmable gate array (FPGA) in a 1152-BBGA FCBGA package designed for high-performance, transceiver-centric systems. It combines a high logic count with abundant on-chip memory and DSP resources to address bandwidth- and DSP-intensive applications.

As a member of the Stratix V family, this GS variant targets transceiver-based DSP applications and data-centric systems, delivering the integration and building blocks needed for packet processing, optical transport, broadcast, and high-performance computing markets.

Key Features

  • High Logic Density  457,000 logic elements provide substantial programmable fabric for complex system designs.
  • Embedded Memory  Approximately 39.9 Mbits of on-chip RAM (39,936,000 bits) in M20K-style memory blocks for buffering, packet storage, and large-table implementations.
  • Variable-Precision DSP Resources  Stratix V GS devices support up to 3,926 18×18 or 1,963 27×27 multipliers, enabling high-precision, high-throughput DSP functions.
  • Integrated Transceivers  GS-class transceivers with 14.1 Gbps data rate capability, suitable for backplane and optical interface applications.
  • Process and Core Voltage  Built on a 28-nm process; core voltage options in the family include 0.85 V or 0.9 V. This specific device operates with a supply range of 870 mV to 930 mV.
  • I/O and Packaging  552 user I/Os and a 1152-BBGA (supplier package: 1152-FBGA (35x35)) surface-mount package for dense board-level integration.
  • Clocking and Hard IP  Family includes fractional PLLs and Embedded HardCopy blocks for hardened IP instantiations such as PCIe Gen1/Gen2/Gen3 as part of the Stratix V architecture.
  • Commercial Grade and Compliance  Commercial operating range and RoHS-compliant construction for standard electronic applications.
  • Operating Range  Specified for 0 °C to 85 °C ambient operation.

Typical Applications

  • High‑Performance DSP Systems  Leverage the large array of variable-precision DSP multipliers for signal processing tasks in broadcast and HPC workloads.
  • Optical and Backplane Interfaces  Use integrated 14.1 Gbps transceivers for backplane and optical transport link implementations.
  • Packet Processing and Network Equipment  Combine high logic density, ample embedded memory, and transceivers to implement packet engines, traffic management, and line cards.
  • Prototype-to-ASIC Flow  Take advantage of the Stratix V family’s Embedded HardCopy Block and documented HardCopy path for low-risk production transitions when applicable.

Unique Advantages

  • Substantial Programmable Fabric: 457,000 logic elements enable integration of complex custom logic, reducing external device count.
  • Large On‑Chip Memory: Approximately 39.9 Mbits of embedded RAM supports deep buffers and on-chip data structures for low-latency processing.
  • DSP‑Centric Resource Mix: Up to 3,926 18×18 or 1,963 27×27 multipliers allow flexible precision choices for demanding signal-processing algorithms.
  • Transceiver Integration: GS-class transceivers at 14.1 Gbps simplify high-speed I/O design for optical and backplane links.
  • Dense I/O and Compact Package: 552 I/Os in a 1152-BBGA surface-mount package supports high pin-count designs in a compact footprint.
  • RoHS‑Compliant Commercial Offering: Commercial grade device with RoHS compliance for mainstream electronic applications.

Why Choose 5SGSMD5H3F35C2N?

The 5SGSMD5H3F35C2N positions itself as a high-capacity, transceiver-focused Stratix V GS device that balances large programmable logic, extensive embedded memory, and a dense complement of DSP multipliers. It is well suited for designers building transceiver-based DSP systems, optical transport modules, and advanced packet-processing hardware who require integrated high-speed I/O and substantial on-chip resources.

As part of the Stratix V family, this device benefits from architectural building blocks such as adaptive logic modules, M20K embedded memory, fractional PLLs, and Embedded HardCopy options—providing a pathway from prototyping to higher-volume production where applicable.

Request a quote or submit a pricing inquiry to receive availability and lead-time information for the 5SGSMD5H3F35C2N.

Request a Quote

















    No file selected



    Our team will respond within 24 hours.


    I agree to receive newsletters and promotional emails. I can unsubscribe at any time.

    Certifications and Membership
    NQA AS9100 CMYK ANAB
    NQA AS9100 ANAB Badge
    ESD2020 Badge
    ESD2020 Association Badge
    GIDEP Badge
    GIDEP Badge
    Suntsu ERAI MemberVerification
    Suntsu ERAI Member Verification
    Available Shipping Methods
    FedEx
    UPS
    DHL
    Accepted Payment Methods
    American Express
    American Express
    Discover
    Discover
    MasterCard
    MasterCard
    Visa
    Visa
    UnionPay
    UnionPay

    Date Founded: 1968


    Headquarters: Santa Clara, California, USA


    Employees: 130,000+


    Revenue: $54.23 Billion


    Certifications and Memberships: ISO9001:2015, ISO14001:2015, ISO17025:2017, ISO27001:2022, ISO45001:2018, ISO50001:2018


    Featured Products
    Latest News
    keyboard_arrow_up