EP1S20B672C7N
| Part Description |
Stratix® Field Programmable Gate Array (FPGA) IC 426 1669248 18460 672-BBGA |
|---|---|
| Quantity | 1,217 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-BGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 426 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1846 | Number of Logic Elements/Cells | 18460 | ||
| Number of Gates | N/A | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 1669248 |
Overview of EP1S20B672C7N – Stratix® Field Programmable Gate Array (FPGA) IC 426 1669248 18460 672-BBGA
The EP1S20B672C7N is a Stratix-series Field Programmable Gate Array (FPGA) featuring a high-density logic fabric and extensive on-chip memory. It provides 18,460 logic elements, approximately 1.67 Mbits of embedded RAM, and 426 general-purpose I/Os in a 672-BBGA (35×35) package.
Designed for commercial-grade applications, this surface-mount device supports supply voltages from 1.425 V to 1.575 V and an operating temperature range of 0 °C to 85 °C. The device is RoHS compliant and is documented in the Stratix device handbook for architecture, memory, I/O, PLLs, and configuration details.
Key Features
- Logic Capacity — 18,460 logic elements provide a substantial programmable fabric for complex digital designs.
- On‑Chip Memory — Approximately 1.67 Mbits of embedded RAM for local buffering, state storage, and memory‑based functions.
- I/O Resources — 426 I/O pins with support for Stratix I/O structures including double-data-rate I/O and advanced I/O standards as described in the device handbook.
- Clocking and Timing — Integrated PLLs and hierarchical clocking networks (enhanced and fast PLLs covered in the handbook) for flexible clock management.
- Dedicated DSP & Multiplier Blocks — Architecture includes multiplier and DSP interfaces to support arithmetic- and signal-processing functions.
- Configuration & Test — Supports JTAG boundary-scan, SignalTap II embedded logic analysis, and multiple configuration schemes including partial reconfiguration.
- Package & Mounting — 672-BBGA (35×35) surface-mount package suitable for board-level integration.
- Power & Thermal — Supply voltage range 1.425 V to 1.575 V; commercial operating temperature range 0 °C to 85 °C.
- Compliance — RoHS compliant.
Typical Applications
- High‑performance signal processing — Use the device’s DSP and multiplier resources together with on-chip RAM to implement image, video, and real-time signal-processing pipelines.
- Memory interface and buffering — Embedded RAM and configurable I/O support external RAM interfacing and custom memory controller designs described in the Stratix handbook.
- High‑speed I/O systems — 426 I/Os and Stratix I/O features enable complex parallel or DDR interfaces for communications and data-acquisition systems.
- Prototyping and system integration — Large logic capacity and flexible configuration options support board- and system-level prototyping of custom digital functions.
Unique Advantages
- Large programmable fabric — 18,460 logic elements accommodate complex state machines, custom logic, and wide datapaths without immediate need for external glue logic.
- Substantial on‑chip memory — Approximately 1.67 Mbits of embedded RAM reduce dependence on external memory for many buffering and storage tasks.
- Extensive I/O count — 426 I/Os provide design flexibility for parallel buses, multi-channel interfaces, and mixed I/O standards.
- Flexible clocking — Integrated PLLs and hierarchical clock networks enable versatile clock domain management as documented in the device handbook.
- Commercial‑grade, RoHS compliant — Surface-mount package and commercial temperature grade simplify procurement and assembly for standard commercial products.
- Documented architecture — Detailed Stratix device handbook material covering architecture, memory modes, I/O timing, and configuration assists development and verification.
Why Choose EP1S20B672C7N?
The EP1S20B672C7N offers a balance of logic density, embedded memory, and I/O capacity in a single commercial-grade Stratix FPGA package. Its documented architecture—including logic array blocks, memory modes, DSP interfaces, and clocking resources—makes it suitable for complex digital designs that require integrated processing, memory, and flexible I/O.
For engineering teams building data‑intensive or high‑I/O systems, this device provides a platform with scalable resources, on-chip memory, and configuration features supported by comprehensive Stratix documentation to speed design and validation.
Request a quote or submit an inquiry to receive pricing and availability information for EP1S20B672C7N. Our team can provide lead-time details and support for your procurement and design planning.

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