EP1S20F672I7
| Part Description |
Stratix® Field Programmable Gate Array (FPGA) IC 426 1669248 18460 672-BBGA |
|---|---|
| Quantity | 1,039 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 426 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1846 | Number of Logic Elements/Cells | 18460 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 1669248 |
Overview of EP1S20F672I7 – Stratix® FPGA – 18,460 logic elements, ~1.67 Mbits RAM, 426 I/Os, 672-BBGA
The EP1S20F672I7 is a Stratix® Field Programmable Gate Array (FPGA) offered in a 672-ball BGA package. It implements Stratix family architecture to deliver a flexible programmable fabric with 18,460 logic elements, approximately 1.67 Mbits of embedded memory, and up to 426 user I/Os.
Targeted at industrial applications, this device combines dense logic, substantial embedded RAM, and a comprehensive I/O complement in a surface-mount 672-BBGA / 672-FBGA (27×27) package, with an operating voltage range of 1.425–1.575 V and an operating temperature range of −40 °C to 100 °C.
Key Features
- Logic Capacity Contains 18,460 logic elements suitable for implementing medium- to large-scale programmable logic functions.
- Embedded Memory Approximately 1.67 Mbits of on-chip RAM provides storage for buffers, FIFOs, and state machines.
- I/O Density & Package Up to 426 user I/Os in a compact surface-mount 672-BBGA package (supplier device package listed as 672-FBGA, 27×27 mm) to support rich external interfacing.
- Stratix Architecture Based on the Stratix device family architecture with logic array blocks, LUT/register resources, dedicated multiplier and adder/output blocks, and TriMatrix memory structures.
- Clocking & PLLs Includes PLLs and hierarchical clocking resources as part of the Stratix architecture for flexible clock management and timing schemes.
- Configuration & Debug Support Family documentation highlights IEEE 1149.1 (JTAG) boundary-scan support and embedded logic-analysis tools (SignalTap II) for configuration and debug.
- Power & Mounting Surface-mount package with a specified core supply window of 1.425 V to 1.575 V for consistent power planning.
- Industrial Temperature Grade Rated for operation from −40 °C to 100 °C for deployment in industrial environments.
- Regulatory RoHS-compliant.
Typical Applications
- Communications Equipment Implements protocol processing, framing, and interface bridging where large logic capacity and extensive I/O are required.
- Signal Processing & DSP Supports DSP-oriented functions using the Stratix multiplier/adder resources and on-chip memory for buffering and data paths.
- Industrial Control Used for motor control, automation controllers, and machine I/O aggregation benefiting from the industrial temperature rating and dense I/O.
- Prototyping & System Integration A flexible programmable fabric for validating system architectures and consolidating multiple discrete functions into a single FPGA-based solution.
Unique Advantages
- High Logic Integration: 18,460 logic elements enable consolidation of complex logic functions and reduce board-level component count.
- Significant On-Chip Memory: Approximately 1.67 Mbits of embedded RAM allows for local buffering and state storage without relying solely on external memory.
- Extensive I/O Capacity: 426 user I/Os provide flexibility to interface with multiple peripherals, buses, and external devices directly.
- Robust Industrial Operation: Rated for −40 °C to 100 °C to meet demanding environmental and reliability requirements in industrial deployments.
- Comprehensive Stratix Feature Set: Access to Stratix architecture elements such as PLLs, dedicated arithmetic blocks, TriMatrix memory, and JTAG/SignalTap II support streamlines timing, arithmetic, and debug tasks.
- Compact Ball-Grid Package: 672-BBGA / 672-FBGA (27×27) packaging balances pin density and PCB area for space-constrained designs.
Why Choose EP1S20F672I7?
The EP1S20F672I7 combines a substantial logic element count, significant embedded memory, and a large I/O complement within a surface-mount 672-ball BGA package, making it suitable for industrial designs that require programmable integration and robust temperature performance. Its implementation of Stratix architecture elements (clocking, on-chip memory structures, and arithmetic blocks) supports complex timing and data-path requirements.
This device is well suited to engineers and system designers seeking to consolidate functionality, manage multiple high-density interfaces, and deploy solutions across industrial environments while leveraging the documented Stratix family features for configuration and debug.
Request a quote or submit an inquiry to obtain pricing and availability for EP1S20F672I7 and add it to your next design evaluation.

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