EP20K160EFC144-1
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 88 81920 6400 144-LQFP |
|---|---|
| Quantity | 479 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 88 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 640 | Number of Logic Elements/Cells | 6400 | ||
| Number of Gates | 404000 | ECCN | OBSOLETE | HTS Code | 0000.00.0000 | ||
| Qualification | N/A | Total RAM Bits | 81920 |
Overview of EP20K160EFC144-1 – APEX-20KE FPGA IC, 88 I/O, 81,920-bit RAM, 6,400 Logic Elements, 144-LQFP
The EP20K160EFC144-1 is an APEX-20KE field programmable gate array (FPGA) from Intel, built on the APEX 20K family MultiCore architecture. It integrates lookup-table (LUT) logic, product-term logic and embedded system blocks (ESBs) to support register‑intensive and memory‑centric functions.
With 6,400 logic elements, approximately 0.082 Mbits of embedded memory and 88 I/O pins in a 144‑LQFP package, this commercial‑grade device is suited for designs that require on‑chip RAM, flexible I/O and integrated clock management within a surface‑mount footprint.
Key Features
- Logic Capacity — 6,400 logic elements delivering the programmable fabric needed for register‑intensive and combinatorial logic.
- Embedded Memory — 81,920 bits of on‑chip RAM (approximately 0.082 Mbits) implemented in ESBs for FIFOs, dual‑port RAM and content‑addressable memory.
- System Integration (MultiCore) — MultiCore architecture combining LUT logic, product‑term logic and embedded memory to consolidate logic and memory functions on a single device.
- I/O and Interfaces — 88 user I/O pins with MultiVolt support and programmable I/O features (programmable clamp to VCCIO, individual tri‑state enables, programmable output slew‑rate) to interface with a range of external devices.
- Clock Management — Flexible clock circuitry with up to four PLLs, a built‑in low‑skew clock tree and support for up to eight global clock signals; includes features such as ClockLock, ClockBoost and ClockShift for phase and delay control.
- Performance Scale — Device family heritage supports up to 404,000 system gates on this density level, providing substantial logic resource headroom for complex designs.
- Power and Supply — Designed for low‑voltage operation with a specified supply range of 1.71 V to 1.89 V and surface‑mount package for compact board integration.
- Package & Mounting — 144‑LQFP package (supplier device package listed as 144‑TQFP, 20×20) for surface‑mount assembly.
- Commercial Temperature Grade — Rated for operation from 0 °C to 85 °C for standard commercial applications.
- RoHS Compliant — Conforms to RoHS environmental requirements.
Typical Applications
- Embedded Systems — Implement on‑chip memory functions and custom control logic where embedded FIFOs, dual‑port RAM or CAM structures are required.
- Interface & Bridge Logic — Use the device’s MultiVolt I/O and programmable I/O features to bridge between different voltage domains or protocol interfaces.
- High‑performance Buffering — Deploy ESBs for FIFO buffering and dual‑port memory in data path designs that need compact on‑chip storage.
- Clocked Data Processing — Leverage multiple PLLs and global clocks for synchronous designs requiring low‑skew distribution and phase/delay tuning.
Unique Advantages
- Integrated Memory and Logic: Embedded system blocks provide dedicated on‑chip RAM and memory primitives, reducing external memory needs and BOM complexity.
- Flexible Clocking: Multiple PLLs and programmable clock features enable precise clock domain management and timing optimization within a single device.
- Programmable I/O Control: MultiVolt I/O and programmable clamp/slew/tri‑state controls simplify interfacing with diverse external components and help manage signal integrity.
- Compact, Surface‑Mount Package: 144‑LQFP (20×20 supplier footprint) provides a compact form factor for space‑constrained board layouts while supporting surface‑mount assembly.
- Commercial‑grade Reliability: Rated for 0 °C to 85 °C operation and RoHS compliance for typical commercial embedded deployments.
Why Choose EP20K160EFC144-1?
The EP20K160EFC144-1 delivers a balanced combination of logic capacity, embedded memory and flexible I/O within the proven APEX 20K family architecture. It addresses designs that need integrated memory primitives (FIFOs, dual‑port RAM, CAM), multi‑domain I/O interfacing and advanced clock management, all in a 144‑lead surface‑mount package.
This device is well suited to development teams and procurement for commercial embedded, communications and interface applications that require a compact FPGA solution with integrated on‑chip memory and configurable clock/I/O resources backed by the APEX 20K device family.
Request a quote or submit a purchasing inquiry to obtain pricing, availability and lead‑time details for the EP20K160EFC144-1.

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