EP20K160EFC484-2N
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 316 81920 6400 484-BBGA |
|---|---|
| Quantity | 1,715 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 484-FBGA (23x23) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 484-BBGA | Number of I/O | 316 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 640 | Number of Logic Elements/Cells | 6400 | ||
| Number of Gates | 404000 | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 81920 |
Overview of EP20K160EFC484-2N – APEX-20KE Field Programmable Gate Array (FPGA), 6,400 logic elements, 316 I/O
The EP20K160EFC484-2N is an APEX-20KE family field-programmable gate array from Intel. It implements the APEX 20K MultiCore architecture with lookup-table (LUT) logic, product-term logic and embedded system blocks (ESBs) for memory and combinatorial functions.
With 6,400 logic elements, approximately 81,920 bits of embedded RAM, up to 316 user I/O and a compact 484-BBGA surface-mount package, this device targets general-purpose commercial designs that require integrated logic, embedded memory and flexible I/O in a low-voltage (1.71–1.89 V) platform.
Key Features
- MultiCore architecture Integrates LUT logic, product-term logic and embedded system blocks (ESBs) to combine register-intensive and memory-oriented functions within the APEX 20K family.
- Logic capacity 6,400 logic elements and approximately 404,000 system gates (per device specification) for medium-density logic implementations.
- Embedded memory Approximately 81,920 bits of on-chip RAM provided through ESBs for FIFOs, dual-port RAM and CAM-style functions.
- I/O and interface flexibility 316 user I/O pins with MultiVolt I/O support (series-level support for multiple I/O voltage levels) to interface with a variety of external devices and memory types.
- Clock management Series-level features include support for up to four PLLs, a low-skew clock tree and programmable clock phase/delay controls for deterministic clocking.
- Low-voltage operation and power saving Operates from 1.71 V to 1.89 V; APEX 20K devices include low-power design elements and ESB programmable power-saving modes.
- Package and mounting 484-BBGA package (supplier device package listed as 484-FBGA, 23×23) with surface-mount mounting for compact board implementation.
- Commercial temperature grade Rated for 0 °C to 85 °C operation to meet general commercial application environments.
- Standards and compliance RoHS compliant.
Typical Applications
- Embedded systems and SOPC integration Use the integrated ESBs and LUT logic for on-chip memory structures, protocol handling and system-on-programmable-chip designs.
- Memory interface controllers Implement controllers and interfacing logic for external high-speed memories using the device's embedded RAM and flexible I/O.
- I/O-intensive control and bridging With up to 316 user I/O pins and MultiVolt I/O support, deploy the device for protocol bridging, peripheral interfaces and bus logic.
- Clocked data paths and timing-critical logic Leverage the device’s PLLs and low-skew clock architecture for deterministic timing in synchronous designs.
Unique Advantages
- Integrated logic and memory: The combination of 6,400 logic elements and ESB-based embedded RAM reduces external memory needs for many designs.
- Flexible I/O capability: Large I/O count and MultiVolt I/O support simplify interfacing to diverse voltage domains and external peripherals.
- Compact surface-mount package: The 484-BBGA/484-FBGA (23×23) package enables high-density board layouts while preserving I/O counts.
- Programmable clocking: Multiple PLLs and clock-control features allow designers to manage skew and create tailored clock domains on-chip.
- Commercial-grade reliability: Rated for 0 °C to 85 °C operation and RoHS compliant for mainstream electronic product development.
- Backed by a known vendor: Part of the APEX 20K family from Intel, aligning with documented family-level features and support resources.
Why Choose EP20K160EFC484-2N?
The EP20K160EFC484-2N positions itself for medium-density FPGA designs that require a balanced mix of logic, embedded memory and flexible I/O in a commercial-temperature, surface-mount package. Its APEX 20K family architecture supports integration of LUT-based logic and ESB memory functions, while series-level clocking and I/O capabilities enable a wide range of system-level implementations.
This device is well suited to design teams and product developers building embedded systems, memory interfaces and I/O-rich control logic who need predictable on-chip resources, low-voltage operation and a compact package form factor backed by Intel.
Request a quote or submit an inquiry for pricing and availability of EP20K160EFC484-2N to evaluate it for your next design.

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