EP2AGX95DF25C4G
| Part Description |
Arria II GX Field Programmable Gate Array (FPGA) IC 260 6839296 89178 572-BGA, FCBGA |
|---|---|
| Quantity | 305 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 26 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 572-FBGA, FC (25x25) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 572-BGA, FCBGA | Number of I/O | 260 | Voltage | 870 mV - 930 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 3747 | Number of Logic Elements/Cells | 89178 | ||
| Number of Gates | N/A | ECCN | PENDING ECCN | HTS Code | 0000.00.0000 | ||
| Qualification | N/A | Total RAM Bits | 6839296 |
Overview of EP2AGX95DF25C4G – Arria II GX FPGA, 572-FBGA, 260 I/O
The EP2AGX95DF25C4G is an Intel Arria II GX field-programmable gate array (FPGA) in a 572-FBGA (FCBGA) package. It pairs a 40‑nm low‑power FPGA engine and adaptive logic architecture with high-performance DSP and transceiver capabilities for designs that require programmable logic, embedded memory and high‑speed serial interfaces.
Targeted at commercial applications, this device is suited for systems requiring significant logic density, on‑chip memory and multi‑protocol serial connectivity, while offering a compact surface‑mount package and RoHS compliance.
Key Features
- FPGA Core and Logic 40‑nm low‑power FPGA architecture with adaptive logic modules and a total of 89,178 logic elements for implementing complex programmable logic.
- Embedded Memory Approximately 6.84 Mbits of on‑chip RAM for buffering, state storage and memory‑intensive logic functions.
- High‑Performance DSP Family DSP resources support high‑speed arithmetic; the series documents DSP blocks rated to 550 MHz and configurable multipliers for signal processing workloads.
- Transceivers & I/O Device provides 260 user I/O pins in a 572‑FBGA footprint; the Arria II GX family supports multi‑Gbps transceivers (family support up to 6.375 Gbps) and common serial interface protocols.
- Package & Mounting 572‑FBGA (FC) package, 25 × 25 mm footprint, surface‑mount mounting type suitable for compact board designs.
- Power and Voltage Specified core supply range of 870 mV to 930 mV, reflecting the device’s low‑power architecture and tight supply requirements.
- Operating Conditions & Compliance Commercial grade device with operating temperature range from 0 °C to 85 °C and RoHS compliance.
- Design Ecosystem Arria II family device documentation highlights integrated design flows and IP support for interfaces such as PCIe, Ethernet and DDR3, and interoperability with design tools and DSP/algorithm workflows.
Typical Applications
- High‑speed serial interfaces Implement PCIe, Ethernet and other multi‑Gbps links using the family’s transceiver and PHY capabilities for networking and data‑transport subsystems.
- Digital signal processing Use the device’s DSP resources and embedded memory for real‑time signal processing, filtering and aggregation tasks.
- Memory‑interfaced systems Integrate DDR3 and other memory controller interfaces (family IP) with on‑chip RAM to support buffering and high‑bandwidth data paths.
- Compact, logic‑dense designs Leverage 89,178 logic elements and a 572‑FBGA footprint for space‑constrained applications that require substantial programmable logic.
Unique Advantages
- High logic density: 89,178 logic elements provide the capacity to implement complex logic, state machines and custom processing pipelines in a single device.
- Significant on‑chip memory: Approximately 6.84 Mbits of embedded RAM reduces external memory dependence and accelerates local buffering and FIFO implementations.
- Built for high‑speed systems: Family transceiver and PHY support for multi‑Gbps serial protocols enables integration of PCIe, Ethernet and other serial links.
- Compact package footprint: 572‑FBGA (25 × 25 mm) surface‑mount package simplifies board integration where space is constrained.
- Commercial readiness and compliance: Rated for 0 °C to 85 °C operation and RoHS compliant for mainstream commercial product development.
- Toolchain and IP support: The Arria II family documentation highlights integrated design flows and available IP for common interfaces, aiding faster system bring‑up.
Why Choose EP2AGX95DF25C4G?
The EP2AGX95DF25C4G combines a 40‑nm low‑power FPGA fabric, substantial logic capacity and embedded memory with Arria II GX family transceiver and DSP capabilities, making it a practical choice for commercial designs that require programmable logic plus high‑speed serial connectivity. Its 572‑FBGA package and surface‑mount mounting support compact board layouts while the specified supply and operating range align with standard commercial system requirements.
This device is well suited to engineers building data‑plane, signal‑processing or interface‑centric systems who need an integrated, programmable solution backed by the Arria II design ecosystem and family‑level IP and tool support.
Request a quote or submit a pricing inquiry to evaluate EP2AGX95DF25C4G for your next design project.

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