EP2AGX65DM17I6G
| Part Description |
Arria II GX Field Programmable Gate Array (FPGA) IC 156 5371904 60214 |
|---|---|
| Quantity | 321 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 8 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | N/A | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | N/A | Number of I/O | 156 | Voltage | 870 mV - 930 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2530 | Number of Logic Elements/Cells | 60214 | ||
| Number of Gates | N/A | ECCN | PENDING ECCN | HTS Code | 0000.00.0000 | ||
| Qualification | N/A | Total RAM Bits | 5371904 |
Overview of EP2AGX65DM17I6G – Arria II GX FPGA, 156 I/O, approximately 5.37 Mbits RAM, 60,214 logic elements
The EP2AGX65DM17I6G is an Intel Arria II GX field programmable gate array (FPGA) in a surface-mount package targeted at industrial-grade applications. It combines a 40‑nm low‑power FPGA engine with a sizeable logic fabric and embedded memory to address high‑performance serial interfaces, protocol offload, and system integration tasks.
With 60,214 logic elements, approximately 5.37 Mbits of on‑chip RAM and 156 user I/Os, this device is suited for designs requiring dense logic, multiple high‑speed interfaces, and operation across an extended temperature range.
Key Features
- Core Architecture 40‑nm low‑power FPGA engine with adaptive logic modules and eight‑input fracturable look‑up tables as described for the Arria II family.
- Logic Capacity 60,214 logic elements to implement complex glue logic, protocol engines, and custom processing pipelines.
- Embedded Memory Approximately 5.37 Mbits of on‑chip RAM for FIFOs, buffers, and local data storage.
- High‑Speed Transceivers Support for up to 24 full‑duplex transceivers with data rates between 600 Mbps and 6.375 Gbps for serial protocols and link layers.
- I/O and Interfaces 156 user I/Os; family documentation highlights ease of implementing PCIe, Ethernet, DDR3 and other common interfaces using available IP and design tools.
- DSP & Arithmetic Dedicated DSP blocks and configurable multipliers (various operand widths) with hardcoded add/sub/accumulate functions for signal processing tasks; DSP blocks documented up to 550 MHz.
- Security & Configuration Support for programming file encryption (256‑bit AES) and multiple configuration options for design security and flexible provisioning.
- Power & Supply Device core supply range specified at 870 mV to 930 mV, enabling targeted power budgeting in system designs.
- Package & Environmental Surface mount device rated for industrial operation from −40 °C to 100 °C; RoHS compliant.
Typical Applications
- High‑Speed Networking & Communications Implements PHY/MAC and link layer functions for PCIe, Ethernet and other serial protocols using integrated transceivers and available IP.
- Telecom & Wireless Infrastructure Hosts protocol processing, framing, and DSP tasks leveraging on‑chip DSP resources and configurable multipliers.
- Storage & Host Interfaces Enables protocol offload and custom bridge logic for SATA/SAS, PCIe and other host connectivity applications.
- Embedded System Integration Provides glue logic, memory buffering and interface aggregation for complex embedded controllers and data‑path modules.
Unique Advantages
- Substantial logic and memory in one device: 60,214 logic elements and approximately 5.37 Mbits of embedded RAM reduce board count and simplify partitioning of logic and buffering.
- High‑speed serial support: Up to 24 full‑duplex transceivers at up to 6.375 Gbps enable direct implementation of multiple serial links without external PHYs.
- Industrial temperature rating: Specified operation from −40 °C to 100 °C supports deployments in extended‑temperature environments.
- Design security and flexible configuration: AES programming file encryption and multiple configuration options protect IP and enable secure provisioning.
- Toolchain and IP ecosystem: Arria II family documentation references integration with common Intel/Altera tooling and IP for interfaces such as PCIe, Ethernet and DDR3, accelerating development.
Why Choose EP2AGX65DM17I6G?
The EP2AGX65DM17I6G positions itself as a versatile industrial‑grade FPGA for designs that require substantial logic capacity, embedded memory, and multi‑link high‑speed serial connectivity. Its combination of 60,214 logic elements, approximately 5.37 Mbits of on‑chip RAM, and Arria II family transceiver capabilities makes it well suited for communication, protocol bridging, and embedded system integration tasks.
Engineers selecting this device gain access to the Arria II family feature set—low‑power 40‑nm engine, DSP resources, and proven interface IP—paired with a supply and thermal envelope appropriate for ruggedized applications, delivering a scalable platform for mid‑to‑high complexity designs.
Request a quote or submit your design requirements to receive pricing and availability information for EP2AGX65DM17I6G.

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