LCMXO1200C-3BN256C

IC FPGA 211 I/O 256CABGA
Part Description

MachXO Field Programmable Gate Array (FPGA) IC 211 9421 1200 256-LFBGA, CSPBGA

Quantity 988 Available (as of October 8, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusActive
Manufacturer Standard Lead Time20 Weeks
Datasheet

Specifications & Environmental

Device Package256-CABGA (14x14)GradeCommercialOperating Temperature0°C – 85°C
Package / Case256-LFBGA, CSPBGANumber of I/O211Voltage1.71 V - 3.465 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs150Number of Logic Elements/Cells1200
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits9421

Overview of LCMXO1200C-3BN256C – MachXO FPGA, 1200 logic elements, 211 I/Os

The LCMXO1200C-3BN256C is a MachXO family Field Programmable Gate Array (FPGA) in a 256-ball LFBGA package designed for commercial embedded logic applications. It combines non-volatile instant-on behavior with FPGA-style LUT-based logic and embedded memory to address glue logic, bus interfacing and control tasks where integration, low-latency startup and flexible I/O are important.

This surface-mount device provides 1,200 logic elements, approximately 9.4 Kbits of on-chip RAM, and 211 user I/Os, making it a compact, single-chip solution for system control, interface bridging and in-field logic updates.

Key Features

  • Core Logic  1,200 logic elements (LUT-based) for implementing glue logic, control state machines and small-to-medium combinational/sequential designs.
  • Memory  Approximately 9.4 Kbits of total on-chip RAM (9,421 bits) for distributed and embedded memory use.
  • I/O Capacity and Flexibility  211 user I/Os for broad connectivity; programmable I/O buffers support a wide range of interfaces for system-level flexibility.
  • Non-Volatile, Instant-On Architecture  MachXO family features non-volatile configuration with instant-on startup and single-chip operation without external configuration memory.
  • In-Field Reconfiguration and Low-Power  Supports background programming and in-field reconfiguration capabilities, and includes sleep-mode operation to reduce static current.
  • Clocking  Integrated PLL capability for clock multiply/divide and phase adjustments (MachXO1200 family includes one analog PLL).
  • Power  Operates across a supplied voltage range of 1.71 V to 3.465 V to accommodate multiple supply domains.
  • Package and Mounting  256-LFBGA (256-CABGA, 14×14 mm) surface-mount package; RoHS-compliant.
  • Commercial Grade  Rated for commercial operating temperatures from 0 °C to 85 °C.
  • Design Tool Support  Supported by ispLEVER design tools for synthesis, place-and-route and timing verification (MachXO family tool support).

Typical Applications

  • Glue Logic and System Control  Replace discrete logic with compact programmable logic for power-up sequencing, control state machines and board-level glue.
  • Bus Bridging and Interfacing  Implement protocol adaptation, bus isolation and interface translation using abundant I/O and programmable buffers.
  • Power-Up and Reset Management  Instant-on configuration and single-chip non-volatile operation simplify power sequencing and startup control.
  • Embedded Control and Peripheral Aggregation  Aggregate peripheral control, simple signal processing and timing functions into a single compact package.

Unique Advantages

  • Single-Chip, Non-Volatile Configuration: Eliminates the need for external configuration memory and enables microsecond startup time.
  • High I/O-to-Logic Density: 211 I/Os paired with 1,200 logic elements provide a balance of connectivity and logic capability for interface-heavy designs.
  • In-Field Update Capability: Background programming and reconfiguration support allow firmware updates and logic changes without full system downtime.
  • Low-Power Modes: Sleep mode reduces static current draw for power-sensitive applications.
  • Compact, Surface-Mount Packaging: 256-LFBGA (14×14 mm) package enables dense board layouts while remaining RoHS-compliant.
  • Integrated Clocking Resources: On-chip PLL support simplifies clock management within the device.

Why Choose LCMXO1200C-3BN256C?

The LCMXO1200C-3BN256C targets designers who need a compact, non-volatile FPGA with a strong balance of I/O density and logic resources. With 1,200 logic elements, approximately 9.4 Kbits of on-chip RAM and 211 I/Os in a 256-LFBGA package, it is well suited for board-level control, interface bridging and power-up management in commercial applications.

Its MachXO family capabilities—instant-on non-volatile configuration, in-field reconfiguration, sleep-mode power savings and integrated clocking—combine to reduce BOM complexity and accelerate system bring-up. Support from ispLEVER design tools helps streamline synthesis, place-and-route and timing verification for production designs.

Request a quote or submit an inquiry to obtain pricing, lead time and availability for the LCMXO1200C-3BN256C.

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