LCMXO3LF-6900C-6BG400C

IC FPGA 335 I/O 400CABGA
Part Description

MachXO3 Field Programmable Gate Array (FPGA) IC 335 245760 6864 400-LFBGA

Quantity 1,791 Available (as of October 8, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusActive
Manufacturer Standard Lead Time20 Weeks
Datasheet

Specifications & Environmental

Device Package400-CABGA (17x17)GradeCommercialOperating Temperature0°C – 85°C
Package / Case400-LFBGANumber of I/O335Voltage2.375 V - 3.465 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs858Number of Logic Elements/Cells6864
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits245760

Overview of LCMXO3LF-6900C-6BG400C – MachXO3 FPGA — 6,864 logic elements, 335 I/Os

The LCMXO3LF-6900C-6BG400C is a MachXO3 family Field Programmable Gate Array (FPGA) IC providing a flexible, non-volatile programmable fabric for system-level integration. With 6,864 logic elements, approximately 0.246 Mbits of embedded memory, and up to 335 user I/Os in a 400-LFBGA package, this device targets designs that require mid-density programmable logic, extensive I/O and integrated system functions.

Built with features from the MachXO3 family — including flexible architecture, on-chip clocking and hardened peripheral IP — the device is suited for designs that need programmable glue logic, I/O and interface control, and non-volatile configuration in a surface-mount 400-CABGA (17×17) package.

Key Features

  • Logic Capacity  6,864 logic elements for mid-density programmable logic and glue logic tasks.
  • Embedded Memory  Approximately 0.246 Mbits of on-chip RAM (245,760 bits) supporting ROM/RAM modes, FIFO and memory-cascading configurations as described in the MachXO3 family architecture.
  • I/O Density and Flexibility  Up to 335 user I/Os with pre-engineered source-synchronous I/O and a high-performance, flexible I/O buffer architecture.
  • Configuration and Reconfiguration  Non-volatile, multi-time programmable configuration memory with TransFR reconfiguration capabilities for in-system updates and flexible device programming.
  • Clocking and Timing  Flexible on-chip clocking including sysCLOCK PLLs and clock distribution network to support a variety of clocking topologies.
  • Embedded Hardened IP  Integrated hardened IP functions such as I²C, SPI and timer/counter blocks, on-chip oscillator and user flash memory (UFM) for system-level functions.
  • Power and Reliability Features  Standby modes and power-saving options plus power-on-reset and configuration/test capabilities as part of the MachXO3 family feature set.
  • Packaging and Environmental  Surface-mount 400-LFBGA (supplier package: 400-CABGA, 17×17), commercial grade with RoHS compliance. Recommended operating supply voltage range: 2.375 V to 3.465 V and operating temperature 0 °C to 85 °C.

Typical Applications

  • Interface and I/O Bridging  Use the high I/O count and flexible I/O buffering to implement protocol bridging, parallel/serial interface conversion and board-level glue logic.
  • System Control and Initialization  Non-volatile, multi-time programmable configuration plus on-chip UFM support system-level configuration, boot-time control and managed reconfiguration.
  • Embedded Peripherals Integration  Hardened I²C, SPI and timer/counter blocks enable integration of peripheral management and timing functions without external controllers.

Unique Advantages

  • Mid-density logic with generous I/O: 6,864 logic elements combined with 335 I/Os delivers a balance of programmable resources and connectivity for complex glue and interface tasks.
  • Non-volatile, field-updateable configuration: Multi-time programmable configuration and TransFR reconfiguration allow in-system updates and flexible product lifecycle management.
  • On-chip system IP: Hardened I²C, SPI, timers and oscillator reduce external component count and simplify board-level design.
  • Flexible clocking and memory modes: Integrated PLLs, clock distribution and versatile embedded memory modes (single/dual-port, FIFO) support diverse timing and buffering requirements.
  • Compact, manufacturable package: Surface-mount 400-LFBGA (400-CABGA, 17×17) offers high pin count in a packaged footprint suitable for automated assembly.
  • Regulatory and commercial readiness: Commercial grade device with RoHS compliance and defined operating voltage and temperature ranges for standard embedded applications.

Why Choose LCMXO3LF-6900C-6BG400C?

The LCMXO3LF-6900C-6BG400C is positioned for designers who need a mid-density, non-volatile FPGA with substantial I/O and integrated system functions. Its combination of 6,864 logic elements, approximately 0.246 Mbits of embedded RAM, hardened peripheral IP and flexible clocking makes it well suited for consolidating glue logic, interface control and peripheral management into a single programmable device.

For teams prioritizing in-system programmability, package density and embedded system-level features in a commercially graded, RoHS-compliant device, this MachXO3 part provides a compact, upgradeable platform aligned with the MachXO3 family capabilities detailed in the datasheet.

Request a quote or submit an inquiry to receive pricing, availability and ordering information for LCMXO3LF-6900C-6BG400C.

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