LFE3-35EA-9FN672I

The LFE3-35EA-9FN672I is a Lattice ECP3 field programmable gate array (FPGA) device in a 672-ball fpBGA package. It provides 33,000 logic elements, approximately 1.36 Mbits of embedded memory, and 310 user I/Os for applications requiring flexible I/O, embedded DSP capabilities and high-speed serial interfaces.

As part of the LatticeECP3 family, this device brings an economical FPGA fabric with features such as embedded SERDES, sysDSP slices, and a range of programmable I/O standards—making it suited to communications, video/broadcast, signal processing and industrial applications that require integration and low-voltage operation.

Key Features

• Logic Capacity  33,000 logic elements for implementing a broad range of digital functions and system integration on a single device.
• Embedded Memory  Approximately 1.36 Mbits of embedded RAM (1,358,848 bits / 1327 Kbits) for on-chip buffering, frame storage and data paths.
• High-Speed SERDES (Family)  ECP3 family SERDES support from 150 Mbps to 3.2 Gbps for generic 8b/10b and other serial protocols, enabling multi‑Gbit serial links (per family datasheet).
• sysDSP and Multipliers  Enhanced sysDSP architecture with support for cascaded MAC operations; ECP3-35 devices include 64 18×18 multipliers (family table).
• Flexible I/O and Standards  310 user I/Os with support for many interface standards in the ECP3 family, including LVTTL/LVCMOS, LVDS, SSTL/HSTL and dedicated source-synchronous features (per family datasheet).
• Clocking and Timing  Multiple PLLs and DLLs available in the family; the ECP3-35 device includes 4 PLLs and 2 DLLs (family table).
• Package & Mounting  672-ball fpBGA package (27 × 27 mm), surface-mount construction for high-density board designs.
• Power and Operating Range  Core supply voltage 1.14 V to 1.26 V and industrial operating temperature range of −40 °C to 100 °C.
• Compliance  RoHS compliant.

Typical Applications

• Communications Infrastructure  High-speed SERDES and support for protocols such as PCI Express, Ethernet variants, SONET/SDH and Serial RapidIO (family features) make this device suitable for line cards, fronthaul/backhaul and interface bridging.
• Video & Broadcast Processing  SMPTE 3G support in the family and on-chip memory combined with dsp slices enable video frame buffer, format conversion and real-time video processing tasks.
• High-Performance Signal Processing  sysDSP architecture and 18×18 multipliers provide hardware-accelerated MAC operations for DSP, filtering and real-time analytics.
• Memory Interfaces and Data Buffering  Dedicated DDR/DDR2/DDR3 support and source-synchronous I/O features in the family suit applications that require on-board memory interfaces and tight timing control.
• Industrial Control & Automation  Industrial temperature rating and flexible I/O standards support sensor interfacing, deterministic control logic and machine I/O aggregation.

Unique Advantages

• Balanced integration: Combines 33,000 logic elements and ~1.36 Mbits of embedded memory to consolidate multiple functions on one FPGA.
• High-speed serial capability: Family SERDES support to 3.2 Gbps enables modern high-throughput links without external PHYs.
• DSP-optimized architecture: sysDSP slices and 64 18×18 multipliers (ECP3-35) accelerate compute-intensive signal-processing tasks.
• Flexible I/O ecosystem: 310 I/Os with broad interface standard support from the family simplify board-level connectivity and reduce external components.
• Industry-grade operating range: −40 °C to 100 °C operation and surface-mount fpBGA packaging for robust deployment in industrial environments.
• Low-voltage core: 1.14 V to 1.26 V core supply supports modern power-optimized designs.

Why Choose LFE3-35EA-9FN672I?

The LFE3-35EA-9FN672I delivers a practical balance of logic capacity, on-chip memory and high-speed I/O in a compact 672-ball fpBGA package. Its combination of sysDSP capabilities, SERDES support and flexible I/O makes it a strong choice for designs that require real-time signal processing, multi‑Gbps serial connectivity and dense integration within an industrial temperature envelope.

This device is well suited to engineering teams building communications equipment, video processing modules, industrial controllers or any application where on-chip memory, DSP and versatile I/O reduce system complexity and board-level BOM. Backed by the Lattice ECP3 family feature set and documentation, it provides a scalable, supported platform for mid-range FPGA designs.

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