LFE3-95E-6FN672I

IC FPGA 380 I/O 672FPBGA
Part Description

ECP3 Field Programmable Gate Array (FPGA) IC 380 4526080 92000 672-BBGA

Quantity 690 Available (as of October 7, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeContact Us
Datasheet

Specifications & Environmental

Device Package672-FPBGA (27x27)GradeIndustrialOperating Temperature-40°C – 100°C
Package / Case672-BBGANumber of I/O380Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceUnknownREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs11500Number of Logic Elements/Cells92000
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits4526080

Overview of LFE3-95E-6FN672I – ECP3 Field Programmable Gate Array (FPGA)

The LFE3-95E-6FN672I is an industrial-grade LatticeECP3 FPGA offering a balanced mix of logic, embedded memory, DSP capability and high-density I/O in a 672-BBGA package. Built on the LatticeECP3 family architecture, this device is targeted at high-speed communications, signal processing and system-integration applications that require large logic capacity, plentiful I/O and integrated SERDES.

Key value propositions include approximately 92,000 logic elements, roughly 4.53 Mbits of embedded memory, and up to 380 user I/Os—delivering a platform for integration of protocol handling, data buffering and DSP tasks while meeting industrial temperature and RoHS requirements.

Key Features

  • Core Logic  Approximately 92,000 logic elements provide scalable combinational and sequential resources for glue logic, protocol stacks and custom datapaths.
  • Memory  Approximately 4.53 Mbits of embedded memory (4,526,080 bits) for frame buffering, FIFOs and local data storage.
  • DSP and Multiply Resources  Device-level DSP resources include 18×18 multipliers (128 for the ECP3-95 device class), enabling hardware acceleration of filtering, transforms and MAC-intensive algorithms.
  • High‑Speed Serial and Parallel I/O  Up to 380 user I/Os in the 672-BBGA package. Embedded SERDES support (series-level capability) with channel speeds up to 3.2 Gbps and multi-channel configurations in the 672 fpBGA package.
  • Programmable Clocking  Multiple PLLs and DLLs are available at the device level (ECP3-95 family specifies up to 10 PLLs and 2 DLLs) for flexible clock generation and deskewing.
  • Flexible I/O Standards  Programmable I/O supports a wide range of source-synchronous and single-ended/differential interfaces to simplify interfacing with memory, ADC/DAC and high-speed transceivers (family-level supported standards documented in the ECP3 data sheet).
  • Configuration and System Support  Device-level configuration features include SPI boot flash interface and dual-boot image support (as documented for the LatticeECP3 family), plus on-chip oscillator for initialization.
  • Package, Power and Environment  672-BBGA (supplier package: 672-FPBGA, 27×27 mm) surface-mount package; core supply range 1.14 V to 1.26 V; industrial operating temperature range −40 °C to 100 °C; RoHS compliant.

Typical Applications

  • High‑Speed Communications  Protocol bridging, media conversion and PHY interface logic leveraging high I/O count and embedded SERDES channels for multi-gigabit links.
  • Video and Broadcast Processing  Frame buffering and deterministic datapath processing using on-chip memory and DSP multipliers for video transport or formatting functions.
  • Industrial Signal Processing  Real-time filtering, aggregation and deterministic control logic in industrial systems that require an extended operating temperature range.
  • Memory Interface and Buffering  Local buffering and source-synchronous interface handling using abundant embedded RAM and dedicated I/O features for DDR-style memories and ADC/DAC front ends.

Unique Advantages

  • High Logic Density:  Approximately 92,000 logic elements enable consolidation of multiple functions into a single FPGA, reducing system BOM and board area.
  • Substantial On‑Chip Memory:  Around 4.53 Mbits of embedded RAM supports large frame buffers and FIFO depth without immediate need for external memory.
  • Integrated DSP Primitives:  Dedicated 18×18 multipliers (128 at device class) accelerate MAC-heavy algorithms and offload the CPU for deterministic signal processing.
  • Robust I/O and SERDES:  Up to 380 I/Os and multi-channel SERDES capability at series-level data rates simplify integration of high-speed links and parallel interfaces.
  • Industrial Reliability:  Designed for industrial use with a −40 °C to 100 °C operating range and RoHS compliance to meet long-life and regulatory needs.
  • Flexible Packaging and Power:  27×27 mm 672-FPBGA surface-mount package and narrow core voltage range (1.14 V to 1.26 V) help in predictable board-level power and mechanical planning.

Why Choose LFE3-95E-6FN672I?

The LFE3-95E-6FN672I positions itself as a highly integrated FPGA option within the LatticeECP3 family, combining substantial logic resources, embedded memory and DSP multipliers with high-density I/O and SERDES capability. Its industrial temperature rating and RoHS compliance make it suitable for demanding embedded applications that require long-term robustness and predictable performance.

Designers targeting communications, video, signal processing or complex interface consolidation will find this device appropriate for reducing BOM, simplifying board design and scaling functionality across product iterations—backed by the documented capabilities of the LatticeECP3 family.

Request a quote or submit your requirements to receive pricing and availability for the LFE3-95E-6FN672I.

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