NG80960JA3V33

The NG80960JA3V33 is a single-core, 32-bit i960 microprocessor in a 132-lead QFP surface-mount package, operating at 33 MHz and using a 3.3 V I/O supply. Designed for embedded applications, this commercial-grade device provides an i960 Jx series architecture with on-chip memory and system features suited to compact embedded system designs.

Its architecture and on-chip peripherals target embedded use cases that require deterministic instruction execution, integrated memory resources, and hardware support for interrupts and timing.

Key Features

• Core & Performance i960 core, single 32-bit processor executing one instruction per clock; core clock provided at the 33 MHz rate.
• Memory & Cache JA-series cache and RAM configuration: 2 KB instruction cache and 1 KB direct-mapped data cache, plus 1 KB on-chip data RAM for critical variable storage and single-cycle access.
• Registers & Stack Support Load/store programming model with multiple 32-bit global and local registers and an on-chip stack frame cache that can save register sets automatically on call/return.
• Bus & Data Interface 32-bit multiplexed address/data bus with selectable 8-, 16- or 32-bit bus widths, support for unaligned accesses and selectable endianness (big or little).
• Power & I/O 3.3 V supply with 5 V tolerant inputs and TTL-compatible outputs; surface-mount 132-QFP package for compact board-level integration.
• Timers & Interrupts Two on-chip 32-bit timers with prescaling and an advanced interrupt controller offering programmable priorities, multiple maskable interrupt pins plus NMI, and expanded mode vectoring.
• Debug & Test IEEE 1149.1 (JTAG) boundary-scan compatibility for board-level test and debug.
• Package & Temperature 132-lead plastic quad flat pack (132-QFP), surface mount; commercial operating temperature range 0 °C to 100 °C.
• Compliance RoHS compliant.

Typical Applications

• Embedded Control — Single-core 32-bit processing with on-chip timers and interrupt handling makes the NG80960JA3V33 suitable for real-time control tasks in embedded systems.
• Protocol and Data Processing — 32-bit bus and selectable bus widths support compact protocol processing and data handling in constrained system designs.
• System Controller — Integrated caches, on-chip RAM and stack-frame cache enable compact controller designs with lower external memory requirements.

Unique Advantages

• Deterministic Execution: One instruction per clock architecture provides predictable instruction timing for embedded real-time tasks.
• Integrated Memory Resources: On-chip instruction and data caches plus 1 KB RAM reduce dependence on external memory and simplify board-level design.
• Flexible Bus Configuration: Selectable 8/16/32-bit bus widths and support for unaligned accesses enable flexible memory and peripheral interfacing.
• Compact Surface-Mount Package: 132-QFP surface-mount footprint supports dense PCB layouts while preserving necessary I/O and signal access.
• Robust Interrupt and Timer Support: Programmable interrupt priorities and dual 32-bit timers provide built-in real-time control capability.
• standards-compliant Testability: IEEE 1149.1 JTAG boundary-scan compatibility facilitates board debug and in-system testing.

Why Choose NG80960JA3V33?

The NG80960JA3V33 positions itself as a compact, commercially graded embedded microprocessor combining the i960 Jx architecture with integrated memory, cache and system peripherals. Its single-core 32-bit design, deterministic execution characteristics and on-chip resources make it well suited to embedded designs that require predictable performance and reduced external component count.

Code compatibility across the i960 Jx family and on-chip debug/test features help simplify development and board-level validation, offering a practical option for engineers building commercial embedded controllers and data-handling subsystems.

Request a quote or submit an RFQ for NG80960JA3V33 to receive pricing and availability details for your design requirements.