1SG110HN3F43E1VG

IC FPGA 688 I/O 1760FBGA
Part Description

Stratix® 10 GX Field Programmable Gate Array (FPGA) IC 688 1100000 1760-BBGA, FCBGA

Quantity 30 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusActive
Manufacturer Standard Lead Time12 Weeks
Datasheet

Specifications & Environmental

Device Package1760-FBGA (42.5x42.5)GradeExtendedOperating Temperature0°C – 100°C
Package / Case1760-BBGA, FCBGANumber of I/O688Voltage770 mV - 970 mV
Mounting MethodSurface MountRoHS ComplianceUnknownREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs137500Number of Logic Elements/Cells1100000
Number of GatesN/AECCNN/AHTS CodeN/A
QualificationN/ATotal RAM Bits112197632

Overview of 1SG110HN3F43E1VG – Stratix® 10 GX Field Programmable Gate Array (FPGA) IC

The 1SG110HN3F43E1VG is a Stratix® 10 GX FPGA offering a high-density, high-performance programmable fabric with 1,100,000 logic elements. Built on the Stratix 10 family architecture, it targets advanced applications that require large logic capacity, substantial on-chip RAM, high I/O count and modern package integration.

As part of the Stratix 10 GX device family, this FPGA leverages family-level innovations—including the Intel Hyperflex™ core architecture and 14 nm tri-gate FinFET technology—to deliver enhanced core performance and power efficiency for bandwidth- and compute-intensive designs.

Key Features

  • Logic Capacity  Contains 1,100,000 logic elements suitable for large-scale, complex logic and system implementations.
  • On‑chip Memory  Provides 112,197,632 total RAM bits for buffering, packet processing, and large working datasets within the FPGA fabric.
  • I/O and Packaging  688 I/O pins in a 1760-BBGA (FCBGA) package; supplier device package listed as 1760-FBGA (42.5×42.5 mm). Surface-mount package supports high-density board integration.
  • Family Transceiver and IP Capabilities  Stratix 10 GX/SX family features include heterogeneous 3D SiP transceiver tiles, transceiver data rates up to 28.3 Gbps, and family-level hard IP such as PCI Express Gen3 and 10G Ethernet options.
  • Advanced Core Architecture  Built around the Intel Hyperflex™ core architecture and Intel 14 nm tri-gate (FinFET) process to increase core performance and power efficiency at the family level.
  • DSP and Compute  Family includes variable precision DSP blocks and hard floating-point options for compute-intensive signal processing workloads.
  • Power Supply and Thermal  Core supply range 770 mV to 970 mV; rated operating temperature 0 °C to 100 °C and graded as Extended.

Typical Applications

  • High‑Bandwidth Networking  Large logic capacity and family transceiver options support packet processing, line cards, and switch/route functions that demand high throughput and on‑chip buffering.
  • Data Center Acceleration  On-chip RAM and DSP resources enable custom accelerators and offload engines for workloads that benefit from FPGA-based hardware acceleration.
  • Communications Backplane and Optical Modules  Family-level transceiver performance and hard Ethernet/PCI Express IP make the device suitable for backplane and module-level high-speed communications.
  • Signal Processing and Test Equipment  Large logic fabric, significant RAM, and variable-precision DSP resources support complex signal chains and real-time processing in measurement systems.

Unique Advantages

  • Massive Logic Scale: 1,100,000 logic elements let you consolidate complex subsystems and reduce external components.
  • Substantial On‑Chip Memory: 112,197,632 total RAM bits provide headroom for large FIFOs, packet buffers, and working datasets without immediate external memory dependence.
  • High I/O Density in Compact Package: 688 I/Os in a 1760‑BBGA (1760‑FBGA supplier package, 42.5×42.5 mm) enable dense board-level connectivity while retaining a surface-mount footprint.
  • Family-Level High‑Speed Interfaces: Stratix 10 family transceiver and hard IP capabilities (including PCIe Gen3 and 10G Ethernet) accelerate integration of high-speed links and protocol blocks.
  • Performance and Efficiency Innovations: Family innovations such as the Intel Hyperflex™ core architecture and 14 nm FinFET process deliver improved core performance and power efficiency at the device-family level.

Why Choose 1SG110HN3F43E1VG?

This Stratix® 10 GX part is positioned for designs that require very high logic density, significant on‑chip RAM, and a large I/O count in a compact surface-mount package. It leverages Stratix 10 family innovations—high-performance core architecture, modern process technology and family transceiver/IP options—to meet demanding bandwidth and compute requirements.

Choose 1SG110HN3F43E1VG when your project needs scalable Stratix 10 family capabilities combined with 1,100,000 logic elements, substantial internal RAM, and a 1760‑ball FBGA package to support complex, high-throughput embedded systems.

Request a quote or submit an inquiry to get pricing and availability for 1SG110HN3F43E1VG and discuss how it fits your next high-density FPGA design.

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