1SG280HN2F43E2VGS3
| Part Description |
Stratix® 10 GX Field Programmable Gate Array (FPGA) IC 688 2800000 1760-BBGA, FCBGA |
|---|---|
| Quantity | 283 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 8 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1760-FBGA (42.5x42.5) | Grade | Extended | Operating Temperature | 0°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1760-BBGA, FCBGA | Number of I/O | 688 | Voltage | 770 mV - 970 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 350000 | Number of Logic Elements/Cells | 2800000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 240123904 |
Overview of 1SG280HN2F43E2VGS3 – Stratix® 10 GX FPGA, 1760‑BBGA FCBGA, Extended Grade
The 1SG280HN2F43E2VGS3 is a Stratix® 10 GX field programmable gate array (FPGA) in a 1760‑ball BGA FCBGA package. It is built on the Stratix 10 family architecture and leverages family-level innovations such as the Intel Hyperflex™ core architecture and 14 nm tri‑gate (FinFET) technology described in the device overview.
Designed for high‑performance embedded and system applications, this device provides large logic capacity, extensive on‑chip RAM, and high I/O density to address demanding compute, networking, and acceleration tasks while fitting surface‑mount board designs.
Key Features
- Core Architecture Based on the Intel Stratix 10 GX family and the Hyperflex core architecture as described in the device overview.
- Logic Capacity Approximately 2,800,000 logic elements, enabling complex digital designs and large FPGA implementations.
- On‑Chip Memory Total RAM of 240,123,904 bits for embedded buffering, state storage, and local memory requirements.
- I/O Density 688 user I/O pins to support high‑pin‑count interfaces and dense board integration.
- Package & Mounting 1760‑BBGA (FCBGA) package; supplier device package listed as 1760‑FBGA with package size 42.5 × 42.5 mm. Surface mount device.
- Power Supply Core supply range specified from 770 mV to 970 mV.
- Operating Temperature Extended grade with an operating range of 0 °C to 100 °C.
- Compliance RoHS compliant.
Typical Applications
- High‑performance networking and communications Large logic capacity and high I/O count suit processing and protocol handling in networking equipment and line cards.
- Data center acceleration Significant on‑chip RAM and massive logic resources enable compute‑intensive acceleration tasks and custom data‑path implementations.
- Backplane and high‑speed I/O systems High I/O density supports dense interconnects and complex board‑level interface routing.
- Advanced embedded systems Stratix 10 family architecture and large resource set are suited for embedded processing platforms requiring substantial programmable logic.
Unique Advantages
- High logic capacity: 2,800,000 logic elements let you implement large, multi‑lane designs without partitioning across devices.
- Substantial on‑chip RAM: 240,123,904 bits of internal RAM reduce external memory dependency for buffering and state storage.
- Dense I/O footprint: 688 I/O pins provide flexibility for wide buses, multi‑channel PHYs, and parallel interfaces.
- Compact FCBGA package: 1760‑ball FCBGA in a 42.5 × 42.5 mm footprint enables high‑density PCB implementations while remaining surface‑mount compatible.
- Controlled core voltage range: Defined 770 mV–970 mV supply helps with power planning and regulator selection for system designs.
- Documented Stratix 10 family innovations: Family‑level features such as the Hyperflex core architecture and 14 nm FinFET process are described in the device overview to support performance and power planning.
Why Choose 1SG280HN2F43E2VGS3?
This Stratix 10 GX device positions itself for high‑density, high‑performance FPGA implementations that require substantial logic, on‑chip memory, and a large number of I/O. Its extended temperature grade and defined power and package specifications make it suitable for demanding embedded and system‑level designs that need the Stratix 10 family capabilities.
Developers and system architects targeting complex networking, acceleration, and high‑throughput applications can leverage the documented Stratix 10 family features alongside the specific device resources to scale designs and manage system‑level tradeoffs between logic, memory, I/O, and power.
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