1SG280LN2F43E2LGS3
| Part Description |
Stratix® 10 GX Field Programmable Gate Array (FPGA) IC 688 2800000 1760-BBGA, FCBGA |
|---|---|
| Quantity | 738 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 9 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1760-FBGA (42.5x42.5) | Grade | Extended | Operating Temperature | 0°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1760-BBGA, FCBGA | Number of I/O | 688 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 350000 | Number of Logic Elements/Cells | 2800000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 240123904 |
Overview of 1SG280LN2F43E2LGS3 – Stratix® 10 GX FPGA, 2,800,000 logic elements, 1760-BBGA
The 1SG280LN2F43E2LGS3 is an Intel Stratix® 10 GX field programmable gate array in a 1760-BBGA (1760-FBGA, 42.5 × 42.5 mm) package. This extended-grade, surface-mount FPGA delivers 2,800,000 logic elements, 240,123,904 bits of on-chip RAM and 688 user I/O pins for high-density system designs.
As part of the Stratix 10 family, the device leverages the family’s advanced architecture and silicon innovations to address high-bandwidth, high-performance applications that require large amounts of logic, embedded memory and dense I/O in a compact FCBGA footprint.
Key Features
- Logic Capacity 2,800,000 logic elements provide abundant programmable fabric for complex algorithms, large pipelined datapaths and deep logic integration.
- Embedded Memory 240,123,904 total RAM bits of on-chip memory support large buffers, lookup tables and local data storage for high-throughput designs.
- I/O Density & Package 688 user I/O pins in a 1760-BBGA / 1760-FBGA (42.5 × 42.5 mm) package deliver high channel density for multi-lane interfaces and board-level integration.
- Power and Thermal Supported core voltage range of 820 mV to 880 mV and an operating temperature range of 0 °C to 100 °C (extended grade) for stable operation within specified system environments.
- Family Innovations Stratix 10 family features cited in the device overview include the Intel Hyperflex™ core architecture and Intel 14 nm tri-gate (FinFET) technology, delivering increased core performance and power efficiency at the family level.
- Transceiver and I/O Technologies (Family) The Stratix 10 family description highlights heterogeneous 3D SiP transceiver tiles, high-speed transceiver capability and hard IP building blocks (family-level features) for high-bandwidth communications and system integration.
- Compliance RoHS compliant.
Typical Applications
- High‑performance networking Dense I/O and large on-chip memory allow implementation of multi‑lane packet processing, switching fabric and line-rate protocol acceleration.
- Data center acceleration Large logic and memory resources support custom acceleration kernels, inline data processing and protocol offload in rack-mounted and blade platforms.
- Signal processing and DSP High logic element count and substantial embedded RAM enable complex, variable‑precision DSP functions and real‑time data buffering.
- Platform and system integration High I/O count and a compact 1760‑FBGA footprint simplify integration of multiple high-speed interfaces and dense mezzanine connections.
Unique Advantages
- Large programmable fabric: 2,800,000 logic elements provide headroom for extensive hardware acceleration, custom pipelines and complex control logic without immediate migration to larger family members.
- Substantial on‑chip memory: 240,123,904 bits of embedded RAM reduce external memory dependency for many buffering and stateful processing tasks, simplifying board design and lowering BOM.
- High channel count I/O: 688 user I/O pins enable multi‑lane, multi-protocol interfacing and dense board-level routing for systems requiring numerous external connections.
- Compact, manufacturable package: 1760-FBGA (42.5 × 42.5 mm) package supports high-density assembly while providing the pinout and thermal footprint expected for advanced FPGA deployments.
- Designed for high-performance family features: As a Stratix 10 GX device, it benefits from family-level advancements such as the Hyperflex core architecture and 14 nm FinFET process that target improved core performance and power characteristics.
- Extended-grade operation: 0 °C to 100 °C operating range and RoHS compliance support deployment in constrained thermal environments and current regulatory requirements.
Why Choose 1SG280LN2F43E2LGS3?
The 1SG280LN2F43E2LGS3 positions itself as a high-capacity Stratix 10 GX FPGA suitable for designs that require a combination of large logic resources, significant on-chip memory and dense I/O in a compact FCBGA package. Its extended-grade specification and family-level architectural innovations make it appropriate for demanding networking, data center and signal‑processing applications where integration and performance are critical.
Choosing this device provides scalability within the Stratix 10 family, a high-density package option (1760-FBGA), and a specification set that supports complex system-level integration while maintaining compliance with RoHS requirements.
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