1ST280EY2F55I2LGAS
| Part Description |
Stratix® 10 TX Field Programmable Gate Array (FPGA) IC 296 2800000 2912-BBGA, FCBGA |
|---|---|
| Quantity | 773 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 12 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 2912-FBGA, FC (55x55) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 2912-BBGA, FCBGA | Number of I/O | 296 | Voltage | 820 mV - 880 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 350000 | Number of Logic Elements/Cells | 2800000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 240123904 |
Overview of 1ST280EY2F55I2LGAS – Stratix® 10 TX FPGA, 2912-BBGA
The 1ST280EY2F55I2LGAS is an Intel Stratix® 10 TX field programmable gate array (FPGA) in a 2912-BBGA surface-mount package. It combines Intel HyperFlex™ core architecture and high-density programmable logic with high-speed transceiver capability suitable for demanding bandwidth applications.
Designed for industrial-grade systems, this device offers 2,800,000 logic elements, large on-chip RAM (240,123,904 bits), and extensive I/O, enabling high-throughput designs such as next-generation networking, compute acceleration, and high-speed data transport.
Key Features
- Core & architecture
Intel HyperFlex™ core architecture and 14 nm technology deliver the architectural foundation described for the Stratix 10 TX family. - Logic density
2,800,000 logic elements provide a high-capacity fabric for complex algorithms, data path logic, and large-scale state machines. - On-chip memory
240,123,904 total RAM bits support large buffering and on-chip data storage for high-throughput designs. - High-speed transceivers
Stratix 10 TX family transceivers support dual-mode operation (PAM4 and NRZ) with data-rate capabilities cited in the device overview for chip-to-chip, chip-to-module, and backplane applications. - Hard IP support
Family-level features include hardened PCI Express Gen3 and high-speed Ethernet MACs with Reed-Solomon FEC for NRZ and PAM4 signals, as documented in the device overview. - I/O and package
296 user I/O pins in a 2912-BBGA (FCBGA) package; supplier device package noted as 2912-FBGA, FC (55×55). Mounting type is surface mount. - Power and operating conditions
Specified core voltage supply range is 820 mV to 880 mV. Operating temperature range is −40 °C to 100 °C, and the device is RoHS compliant.
Typical Applications
- High-performance networking
Use the device for packet processing, line cards, and MAC-offload functions where high transceiver bandwidth and hardened Ethernet/IP features accelerate throughput. - Data center and switch fabric
Leverage dense logic and large on-chip memory for traffic shaping, telemetry, and forwarding engines in switch and router platforms. - Chip-to-module and backplane connectivity
Dual-mode transceiver capability supports high-speed links for board-to-board and backplane interconnects. - Compute acceleration and custom processing
Large logic capacity and RAM allow implementation of accelerators, DSP pipelines, and custom packet-processing engines.
Unique Advantages
- High logic capacity: The 2,800,000 logic elements enable large, integrated designs that reduce the need for multiple FPGAs and simplify system architecture.
- Substantial on-chip memory: 240,123,904 bits of RAM support deep buffering and in-line data processing without relying exclusively on external memory.
- Integrated high-speed I/O: 296 I/O pins and family-level high-rate transceiver support facilitate high-bandwidth interfaces for networking and interconnect applications.
- Industrial-grade operation: Rated for −40 °C to 100 °C operation and supplied in a 2912-BBGA surface-mount package suitable for robust system deployment.
- Power-specified core: A defined core voltage supply range (820 mV–880 mV) helps with predictable power planning and board-level design.
- Standards-aligned hard IP: Family documentation cites hardened PCIe and Ethernet MAC IP blocks that accelerate common protocol implementations.
Why Choose 1ST280EY2F55I2LGAS?
This Stratix® 10 TX FPGA variant delivers a high-density, industrial-grade platform for designs that demand large programmable fabric, substantial on-chip memory, and high-speed I/O. Its combination of 2.8 million logic elements, extensive RAM, and the Stratix 10 TX architectural features makes it suitable for complex networking, acceleration, and high-bandwidth transport applications.
Selecting this device provides a scalable hardware foundation for systems requiring integrated transceiver capability, hardened protocol IP at the family level, and predictable operating and power parameters—supporting long-term development and deployment in industrial environments.
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