EP1SGX10CF672C6N
| Part Description |
Stratix® GX Field Programmable Gate Array (FPGA) IC 362 920448 10570 672-BBGA |
|---|---|
| Quantity | 261 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 362 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1057 | Number of Logic Elements/Cells | 10570 | ||
| Number of Gates | N/A | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 920448 |
Overview of EP1SGX10CF672C6N – Stratix® GX Field Programmable Gate Array, 672-BBGA
The EP1SGX10CF672C6N is a Stratix® GX family FPGA that combines a scalable, high-performance logic array with integrated high-speed serial transceivers. This device targets high-bandwidth communications and interface bridging, providing a compact, surface-mount 672-BBGA footprint and a commercial operating temperature range.
Key on-chip resources include 10,570 logic elements, approximately 0.92 Mbits of embedded memory, and 362 I/O pins. The device operates from a core supply range of 1.425 V to 1.575 V and is RoHS compliant.
Key Features
- Core Logic 10,570 logic elements for implementing complex digital functions and control logic.
- Embedded Memory Approximately 0.92 Mbits of on-chip RAM for FIFO, buffering, and local data storage.
- High-Speed Transceivers Stratix GX series transceivers provide full-duplex serial operation from 500 Mbps to 3.1875 Gbps, with features such as clock data recovery, 8B/10B encode/decode, and programmable equalization.
- I/O and External Memory Support 362 general-purpose I/O pins and architecture-level support for high-speed external memories and common bus standards for system interfacing.
- DSP and Clocking Dedicated high-speed DSP blocks and up to eight general-purpose PLLs (enhanced and fast PLLs) for multiply-accumulate tasks and flexible clock management.
- Power and Voltage Designed around a 1.5 V logic array with an operating core supply range of 1.425 V to 1.575 V to match system requirements.
- Package and Mounting 672-BBGA (672-FBGA, 27 × 27) surface-mount package for high I/O density in a space-efficient footprint.
- Commercial Grade and Environmental Commercial temperature range of 0 °C to 85 °C and RoHS-compliant construction.
Typical Applications
- Communications Infrastructure High-speed backplane interfaces and protocol bridging using integrated serial transceivers and flexible I/O.
- Chip-to-Chip Interfaces Low-latency, high-bandwidth links between ASICs, processors, and FPGAs enabled by the device's embedded SERDES and CDR capabilities.
- Protocol Conversion Implementation of interface translators and packet processing engines leveraging logic elements, on-chip memory, and DSP resources.
- High-Speed Data Acquisition Front-end aggregation and buffering tasks using on-chip RAM and high-speed I/O for intermediate processing before system-level transfer.
Unique Advantages
- Integrated High-Speed Serial Capability: Embedded transceivers with CDR and programmable equalization simplify multi-gigabit link implementation without separate SERDES components.
- Substantial Logic and Memory in a Compact Package: 10,570 logic elements and approximately 0.92 Mbits of embedded RAM provide a balance of compute and storage in a 672-BBGA footprint.
- Flexible I/O Density: 362 I/O pins support complex interfacing and multiple parallel or serial buses, reducing the need for external multiplexers.
- Robust Clocking and DSP Resources: Multiple PLLs and high-speed DSP blocks enable precise timing, real-time data processing, and efficient implementation of arithmetic-intensive functions.
- Commercial Temperature and RoHS Compliance: Designed for standard commercial applications with RoHS-compliant materials for environmental conformity.
Why Choose EP1SGX10CF672C6N?
The EP1SGX10CF672C6N places a scalable Stratix GX architecture into a high-density 672-BBGA package, offering a mix of logic, embedded memory, DSP resources, and integrated multi-gigabit transceivers. Its electrical and thermal specifications—including a 1.425 V to 1.575 V supply range and 0 °C to 85 °C operating range—make it suitable for commercial designs requiring high-bandwidth interfaces and complex signal processing.
This device is well-suited to engineers building communication interfaces, protocol bridges, and data aggregation modules who need on-chip SERDES, flexible clocking, and a sizable logic/memory resource set within a compact surface-mount package. Its RoHS compliance and commercially graded specification support consistent manufacturing and deployment in standard commercial products.
Request a quote or submit an inquiry for pricing, availability, and technical assistance to evaluate EP1SGX10CF672C6N for your next design.

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