EP20K60ETC144-3
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 92 32768 2560 144-LQFP |
|---|---|
| Quantity | 325 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 92 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2560 | Number of Logic Elements/Cells | 2560 | ||
| Number of Gates | 162000 | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 32768 |
Overview of EP20K60ETC144-3 – APEX-20KE Field Programmable Gate Array (FPGA) 144-LQFP
The EP20K60ETC144-3 is an APEX-20KE series field programmable gate array (FPGA) optimized for mid-density system integration. It uses a MultiCore architecture combining look-up table (LUT) logic, product-term logic, and embedded system blocks (ESBs) to implement register-intensive logic, memory functions, and combinatorial logic.
With 2,560 logic elements, approximately 32.8 kbits of embedded memory, flexible MultiVolt I/O and advanced clock management, this device targets embedded control, high-speed I/O buffering and system-on-programmable-chip integration where compact packaging and commercial-grade operation are required.
Key Features
- Core & Architecture MultiCore architecture integrating LUT-based logic, product-term logic and embedded system blocks for a mix of register-intensive and memory functions.
- Logic Density 2,560 logic elements providing programmable logic resources and up to 162,000 system gates reported for this device family.
- Embedded Memory 32,768 total RAM bits (approximately 32.8 kbits) for FIFOs, dual-port RAM and small buffering tasks implemented in ESBs.
- I/O Flexibility 92 user I/O pins with MultiVolt I/O interface support for 1.8 V, 2.5 V, 3.3 V and 5.0 V signaling as described for the APEX 20K family.
- Clock & Timing Flexible clock management including multiple PLLs, built-in low-skew clock tree and features for clock phase, delay shifting and multiplication/division.
- Power & Supply Internal supply voltage in the range 1.71 V to 1.89 V and family-level low-power design options such as programmable ESB power-saving modes.
- Package & Mounting Surface-mount 144-LQFP (144-TQFP 20×20) package for compact board-level integration.
- Commercial Temperature & Compliance Rated for commercial operation from 0 °C to 85 °C and RoHS compliant.
Typical Applications
- Embedded Control & System Integration Implement custom logic, protocol bridging and embedded peripherals using the MultiCore architecture and ESBs for integrated functions.
- Memory Interfacing & Buffering Use the device's ESBs and on-chip RAM for FIFO buffers, dual-port RAM and small scratchpad memory in memory interface designs.
- High-Speed I/O & Communications Deploy in applications requiring flexible I/O voltages and advanced clock management for synchronous data paths and high-speed signalling.
- Prototyping & Custom Logic Leverage 2,560 logic elements and the APEX 20K feature set to prototype and validate mid-density programmable logic designs.
Unique Advantages
- Integrated MultiCore Architecture: Combines LUT logic, product-term logic and ESBs to implement both logic- and memory-intensive functions on a single device.
- Balanced Logic and Memory Resources: 2,560 logic elements alongside approximately 32.8 kbits of embedded RAM enable compact implementation of control and buffering tasks without external memory for small designs.
- MultiVolt I/O Support: Interfaces with multiple I/O voltage domains (1.8 V, 2.5 V, 3.3 V, 5.0 V) to simplify integration with mixed-voltage systems.
- Flexible Clocking: Multiple PLLs and low-skew clock distribution support complex clocking schemes, phase/delay adjustment and clock multiplication/division.
- Compact Surface-Mount Package: 144-LQFP package provides a space-efficient solution for board-level integration while preserving ample I/O and routing.
- Commercial-Grade Reliability: Rated for 0 °C to 85 °C operation and RoHS compliant for standard commercial application environments.
Why Choose EP20K60ETC144-3?
The EP20K60ETC144-3 delivers a practical balance of programmable logic capacity and embedded memory within a compact 144-LQFP footprint. Its MultiCore architecture and ESBs give designers the ability to consolidate logic-intensive and memory-oriented functions on a single FPGA, while MultiVolt I/O and advanced clock management simplify integration into mixed-voltage, synchronized systems.
This device is well suited to engineers and procurement teams building mid-density embedded systems, interface logic, and prototype designs that require a verified family-level feature set, commercial-temperature operation and RoHS compliance.
Request a quote or submit an inquiry to obtain pricing and availability for the EP20K60ETC144-3.

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